mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-11-04 05:17:07 +00:00
b83bf52113
I've no idea why I decided to handle TMxx differently from all the other high/low logic operations, but it was a stupid thing to do. The high registers aren't available as separate 32-bit registers on z10, so subreg_h32 can't be used on a GR64 there. I've normally been testing with z196 and with -O3 and so hadn't noticed this until now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195473 91177308-0d34-0410-b5e6-96231b3b80d8
50 lines
944 B
LLVM
50 lines
944 B
LLVM
; That that we don't try to use z196 instructions on z10 for TMHH and TMHL.
|
|
;
|
|
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 -O0 | FileCheck %s
|
|
|
|
@g = global i32 0
|
|
|
|
; Check the lowest useful TMHL value.
|
|
define void @f1(i64 %a) {
|
|
; CHECK-LABEL: f1:
|
|
; CHECK-NOT: risblg
|
|
; CHECK-NOT: risbhg
|
|
; CHECK: tmhl {{%r[0-5]}}, 1
|
|
; CHECK-NOT: risblg
|
|
; CHECK-NOT: risbhg
|
|
; CHECK: br %r14
|
|
entry:
|
|
%and = and i64 %a, 4294967296
|
|
%cmp = icmp eq i64 %and, 0
|
|
br i1 %cmp, label %exit, label %store
|
|
|
|
store:
|
|
store i32 1, i32 *@g
|
|
br label %exit
|
|
|
|
exit:
|
|
ret void
|
|
}
|
|
|
|
; Check the lowest useful TMHH value.
|
|
define void @f2(i64 %a) {
|
|
; CHECK-LABEL: f2:
|
|
; CHECK-NOT: risblg
|
|
; CHECK-NOT: risbhg
|
|
; CHECK: tmhh {{%r[0-5]}}, 1
|
|
; CHECK-NOT: risblg
|
|
; CHECK-NOT: risbhg
|
|
; CHECK: br %r14
|
|
entry:
|
|
%and = and i64 %a, 281474976710656
|
|
%cmp = icmp ne i64 %and, 0
|
|
br i1 %cmp, label %exit, label %store
|
|
|
|
store:
|
|
store i32 1, i32 *@g
|
|
br label %exit
|
|
|
|
exit:
|
|
ret void
|
|
}
|