mirror of
https://github.com/c64scene-ar/llvm-6502.git
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b7c0b246da
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81545 91177308-0d34-0410-b5e6-96231b3b80d8
151 lines
5.1 KiB
LLVM
151 lines
5.1 KiB
LLVM
; RUN: llc < %s -march=cellspu > %t1.s
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; RUN: grep ceq %t1.s | count 30
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; RUN: grep ceqb %t1.s | count 10
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; RUN: grep ceqhi %t1.s | count 5
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; RUN: grep ceqi %t1.s | count 5
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; RUN: grep cgt %t1.s | count 30
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; RUN: grep cgtb %t1.s | count 10
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; RUN: grep cgthi %t1.s | count 5
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; RUN: grep cgti %t1.s | count 5
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target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
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target triple = "spu"
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declare <4 x i32> @llvm.spu.si.shli(<4 x i32>, i8)
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declare <4 x i32> @llvm.spu.si.ceq(<4 x i32>, <4 x i32>)
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declare <16 x i8> @llvm.spu.si.ceqb(<16 x i8>, <16 x i8>)
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declare <8 x i16> @llvm.spu.si.ceqh(<8 x i16>, <8 x i16>)
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declare <4 x i32> @llvm.spu.si.ceqi(<4 x i32>, i16)
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declare <8 x i16> @llvm.spu.si.ceqhi(<8 x i16>, i16)
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declare <16 x i8> @llvm.spu.si.ceqbi(<16 x i8>, i8)
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declare <4 x i32> @llvm.spu.si.cgt(<4 x i32>, <4 x i32>)
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declare <16 x i8> @llvm.spu.si.cgtb(<16 x i8>, <16 x i8>)
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declare <8 x i16> @llvm.spu.si.cgth(<8 x i16>, <8 x i16>)
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declare <4 x i32> @llvm.spu.si.cgti(<4 x i32>, i16)
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declare <8 x i16> @llvm.spu.si.cgthi(<8 x i16>, i16)
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declare <16 x i8> @llvm.spu.si.cgtbi(<16 x i8>, i8)
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declare <4 x i32> @llvm.spu.si.clgt(<4 x i32>, <4 x i32>)
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declare <16 x i8> @llvm.spu.si.clgtb(<16 x i8>, <16 x i8>)
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declare <8 x i16> @llvm.spu.si.clgth(<8 x i16>, <8 x i16>)
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declare <4 x i32> @llvm.spu.si.clgti(<4 x i32>, i16)
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declare <8 x i16> @llvm.spu.si.clgthi(<8 x i16>, i16)
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declare <16 x i8> @llvm.spu.si.clgtbi(<16 x i8>, i8)
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define <4 x i32> @test(<4 x i32> %A) {
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call <4 x i32> @llvm.spu.si.shli(<4 x i32> %A, i8 3)
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%Y = bitcast <4 x i32> %1 to <4 x i32>
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ret <4 x i32> %Y
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}
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define <4 x i32> @ceqtest(<4 x i32> %A, <4 x i32> %B) {
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call <4 x i32> @llvm.spu.si.ceq(<4 x i32> %A, <4 x i32> %B)
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%Y = bitcast <4 x i32> %1 to <4 x i32>
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ret <4 x i32> %Y
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}
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define <8 x i16> @ceqhtest(<8 x i16> %A, <8 x i16> %B) {
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call <8 x i16> @llvm.spu.si.ceqh(<8 x i16> %A, <8 x i16> %B)
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%Y = bitcast <8 x i16> %1 to <8 x i16>
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ret <8 x i16> %Y
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}
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define <16 x i8> @ceqbtest(<16 x i8> %A, <16 x i8> %B) {
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call <16 x i8> @llvm.spu.si.ceqb(<16 x i8> %A, <16 x i8> %B)
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%Y = bitcast <16 x i8> %1 to <16 x i8>
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ret <16 x i8> %Y
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}
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define <4 x i32> @ceqitest(<4 x i32> %A) {
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call <4 x i32> @llvm.spu.si.ceqi(<4 x i32> %A, i16 65)
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%Y = bitcast <4 x i32> %1 to <4 x i32>
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ret <4 x i32> %Y
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}
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define <8 x i16> @ceqhitest(<8 x i16> %A) {
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call <8 x i16> @llvm.spu.si.ceqhi(<8 x i16> %A, i16 65)
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%Y = bitcast <8 x i16> %1 to <8 x i16>
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ret <8 x i16> %Y
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}
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define <16 x i8> @ceqbitest(<16 x i8> %A) {
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call <16 x i8> @llvm.spu.si.ceqbi(<16 x i8> %A, i8 65)
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%Y = bitcast <16 x i8> %1 to <16 x i8>
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ret <16 x i8> %Y
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}
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define <4 x i32> @cgttest(<4 x i32> %A, <4 x i32> %B) {
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call <4 x i32> @llvm.spu.si.cgt(<4 x i32> %A, <4 x i32> %B)
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%Y = bitcast <4 x i32> %1 to <4 x i32>
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ret <4 x i32> %Y
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}
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define <8 x i16> @cgthtest(<8 x i16> %A, <8 x i16> %B) {
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call <8 x i16> @llvm.spu.si.cgth(<8 x i16> %A, <8 x i16> %B)
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%Y = bitcast <8 x i16> %1 to <8 x i16>
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ret <8 x i16> %Y
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}
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define <16 x i8> @cgtbtest(<16 x i8> %A, <16 x i8> %B) {
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call <16 x i8> @llvm.spu.si.cgtb(<16 x i8> %A, <16 x i8> %B)
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%Y = bitcast <16 x i8> %1 to <16 x i8>
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ret <16 x i8> %Y
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}
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define <4 x i32> @cgtitest(<4 x i32> %A) {
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call <4 x i32> @llvm.spu.si.cgti(<4 x i32> %A, i16 65)
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%Y = bitcast <4 x i32> %1 to <4 x i32>
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ret <4 x i32> %Y
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}
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define <8 x i16> @cgthitest(<8 x i16> %A) {
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call <8 x i16> @llvm.spu.si.cgthi(<8 x i16> %A, i16 65)
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%Y = bitcast <8 x i16> %1 to <8 x i16>
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ret <8 x i16> %Y
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}
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define <16 x i8> @cgtbitest(<16 x i8> %A) {
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call <16 x i8> @llvm.spu.si.cgtbi(<16 x i8> %A, i8 65)
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%Y = bitcast <16 x i8> %1 to <16 x i8>
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ret <16 x i8> %Y
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}
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define <4 x i32> @clgttest(<4 x i32> %A, <4 x i32> %B) {
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call <4 x i32> @llvm.spu.si.clgt(<4 x i32> %A, <4 x i32> %B)
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%Y = bitcast <4 x i32> %1 to <4 x i32>
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ret <4 x i32> %Y
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}
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define <8 x i16> @clgthtest(<8 x i16> %A, <8 x i16> %B) {
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call <8 x i16> @llvm.spu.si.clgth(<8 x i16> %A, <8 x i16> %B)
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%Y = bitcast <8 x i16> %1 to <8 x i16>
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ret <8 x i16> %Y
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}
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define <16 x i8> @clgtbtest(<16 x i8> %A, <16 x i8> %B) {
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call <16 x i8> @llvm.spu.si.clgtb(<16 x i8> %A, <16 x i8> %B)
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%Y = bitcast <16 x i8> %1 to <16 x i8>
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ret <16 x i8> %Y
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}
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define <4 x i32> @clgtitest(<4 x i32> %A) {
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call <4 x i32> @llvm.spu.si.clgti(<4 x i32> %A, i16 65)
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%Y = bitcast <4 x i32> %1 to <4 x i32>
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ret <4 x i32> %Y
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}
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define <8 x i16> @clgthitest(<8 x i16> %A) {
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call <8 x i16> @llvm.spu.si.clgthi(<8 x i16> %A, i16 65)
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%Y = bitcast <8 x i16> %1 to <8 x i16>
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ret <8 x i16> %Y
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}
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define <16 x i8> @clgtbitest(<16 x i8> %A) {
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call <16 x i8> @llvm.spu.si.clgtbi(<16 x i8> %A, i8 65)
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%Y = bitcast <16 x i8> %1 to <16 x i8>
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ret <16 x i8> %Y
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}
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