Evan Cheng bd3d25c6b1 Added support to STORE and shifts to DAG to DAG isel. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24525 91177308-0d34-0410-b5e6-96231b3b80d8		2005-11-30 02:51:20 +00:00
..
Alpha	No targets support line number info yet.	2005-11-29 06:16:21 +00:00
CBackend	do not allow '.' in symbol names	2005-11-10 21:39:29 +00:00
IA64	No targets support line number info yet.	2005-11-29 06:16:21 +00:00
PowerPC	Represent the encoding of the SPR instructions as they actually are, so	2005-11-29 22:42:50 +00:00
Skeleton	Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.	2005-11-08 02:11:51 +00:00
Sparc	Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.	2005-11-08 02:11:51 +00:00
SparcV8	Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.	2005-11-08 02:11:51 +00:00
SparcV9	Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.	2005-11-08 02:11:51 +00:00
X86	Added support to STORE and shifts to DAG to DAG isel.	2005-11-30 02:51:20 +00:00
Makefile
MRegisterInfo.cpp
SubtargetFeature.cpp
Target.td	Add the majority of the vector machien value types we expect to support,	2005-11-29 05:45:29 +00:00
TargetData.cpp
TargetFrameInfo.cpp
TargetInstrInfo.cpp
TargetMachine.cpp
TargetMachineRegistry.cpp	1. Use SubtargetFeatures in llc/lli.	2005-09-01 21:38:21 +00:00
TargetSchedInfo.cpp
TargetSchedule.td
TargetSelectionDAG.td	Add globaladdress and targetglobaladdress nodes for dag patterns	2005-11-17 07:20:15 +00:00
TargetSubtarget.cpp