Alex Lorenz 03c5b6047e MIR Serialization: Serialize the metadata machine operands. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242916 91177308-0d34-0410-b5e6-96231b3b80d8

2015-07-22 17:58:46 +00:00

..

AArch64

AArch64: Add aditional Cyclone macroop fusion opportunities

2015-07-20 22:34:47 +00:00

AMDGPU

AMDGPU/SI: Add VI patterns to select FLAT instructions for global memory ops

2015-07-20 14:28:41 +00:00

ARM

[ARM] Make the frame lowering code ready for shrink-wrapping.

2015-07-22 16:34:37 +00:00

BPF

…

CPP

…

Generic

Targets: commonize some stack realignment code

2015-07-20 22:51:32 +00:00

Hexagon

[Hexagon] Generate MUX from conditional transfers when dot-new not possible

2015-07-20 21:23:25 +00:00

Inputs

…

Mips

[SDAG] Optimize unordered comparison in soft-float mode (patch by Anton Nadolskiy)

2015-07-15 08:39:35 +00:00

MIR

MIR Serialization: Serialize the metadata machine operands.

2015-07-22 17:58:46 +00:00

MSP430

…

NVPTX

[BranchFolding] do not iterate the aliases of virtual registers

2015-07-22 04:16:52 +00:00

PowerPC

[PPC64LE] More vector swap optimization TLC

2015-07-21 21:40:17 +00:00

SPARC

[SPARC] Cleanup handling of the Y/ASR registers.

2015-07-08 16:25:12 +00:00

SystemZ

…

Thumb

[ARM] Make the frame lowering code ready for shrink-wrapping.

2015-07-22 16:34:37 +00:00

Thumb2

ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2

2015-07-21 00:18:59 +00:00

WebAssembly

[WebAssembly] Create a CodeGen unittest directory.

2015-07-06 23:14:57 +00:00

WinEH

[WinEH] Strip the \01 character from the __CxxFrameHandler3 thunk name

2015-07-13 17:55:14 +00:00

X86

[X86][AVX512] add reduce/range/scalef/rndScale

2015-07-22 12:00:43 +00:00

XCore

Move the personality function from LandingPadInst to Function

2015-06-17 20:52:32 +00:00