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bd7780bc60
be listed second as that is how the instructions are usually created (and is the correct asm syntax) so that it's assembled correctly from its constituents git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17183 91177308-0d34-0410-b5e6-96231b3b80d8
TODO: * implement not-R0 register GPR class * fix rlwimi generation to be use-and-def * implement scheduling info * implement powerpc-64 for darwin * implement powerpc-64 for aix * use stfiwx in float->int * should hint to the branch select pass that it doesn't need to print the second unconditional branch, so we don't end up with things like: b .LBBl42__2E_expand_function_8_674 ; loopentry.24 b .LBBl42__2E_expand_function_8_42 ; NewDefault b .LBBl42__2E_expand_function_8_42 ; NewDefault Currently failing tests that should pass: * MultiSource |- Applications | `- hbd: miscompilation