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llvm-6502/lib/Target/AArch64
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Jiangning Liu a1da819896 This commit allows vectorized loops to be unrolled by a factor of 2 for AArch64. 
A new test case is also added for ARM64.

Patched by Z.Zheng



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206563 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-18 07:57:54 +00:00
..
AsmParser
PR18929:
2014-03-30 17:09:54 +00:00
Disassembler
[MC] Require an MCContext when constructing an MCDisassembler.
2014-04-15 04:40:56 +00:00
InstPrinter
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MCTargetDesc
Completely rewrite ELFObjectWriter::RecordRelocation.
2014-03-29 06:26:49 +00:00
TargetInfo
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Utils
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AArch64.h
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AArch64.td
AArch64: error when both positional & named operands are used.
2014-03-13 09:00:13 +00:00
AArch64AsmPrinter.cpp
[Layering] Move DebugInfo.h into the IR library where its implementation
2014-03-06 00:46:21 +00:00
AArch64AsmPrinter.h
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AArch64BranchFixupPass.cpp
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AArch64CallingConv.td
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AArch64FrameLowering.cpp
Make consistent use of MCPhysReg instead of uint16_t throughout the tree.
2014-04-04 05:16:06 +00:00
AArch64FrameLowering.h
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AArch64InstrFormats.td
AArch64: error when both positional & named operands are used.
2014-03-13 09:00:13 +00:00
AArch64InstrInfo.cpp
Replace PROLOG_LABEL with a new CFI_INSTRUCTION.
2014-03-07 06:08:31 +00:00
AArch64InstrInfo.h
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AArch64InstrInfo.td
[AArch64] Add SchedRW lists to NEON instructions.
2014-03-21 19:34:41 +00:00
AArch64InstrNEON.td
[AArch64] Add SchedRW lists to NEON instructions.
2014-03-21 19:34:41 +00:00
AArch64ISelDAGToDAG.cpp
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AArch64ISelLowering.cpp
This is one of the optimizations ported from ARM64 to AArch64 to address the performance gap between these two back ends. The test case newly added for AArch64 already exists in ARM64.
2014-04-18 05:58:09 +00:00
AArch64ISelLowering.h
This commit enables unaligned memory accesses of vector types on AArch64 back end. This should boost vectorized code performance.
2014-04-18 03:58:38 +00:00
AArch64MachineFunctionInfo.cpp
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AArch64MachineFunctionInfo.h
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AArch64MCInstLower.cpp
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AArch64RegisterInfo.cpp
Make consistent use of MCPhysReg instead of uint16_t throughout the tree.
2014-04-04 05:16:06 +00:00
AArch64RegisterInfo.h
[AArch64] Implement the getCSRFirstUseCost API, mirroring that in ARM64.
2014-04-17 16:19:54 +00:00
AArch64RegisterInfo.td
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AArch64Schedule.td
Fix some doc and comment typos
2014-04-09 14:47:27 +00:00
AArch64ScheduleA53.td
[AArch64] Add SchedRW lists to NEON instructions.
2014-03-21 19:34:41 +00:00
AArch64SelectionDAGInfo.cpp
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AArch64SelectionDAGInfo.h
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AArch64Subtarget.cpp
This commit enables unaligned memory accesses of vector types on AArch64 back end. This should boost vectorized code performance.
2014-04-18 03:58:38 +00:00
AArch64Subtarget.h
This commit enables unaligned memory accesses of vector types on AArch64 back end. This should boost vectorized code performance.
2014-04-18 03:58:38 +00:00
AArch64TargetMachine.cpp
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AArch64TargetMachine.h
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AArch64TargetObjectFile.cpp
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AArch64TargetObjectFile.h
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AArch64TargetTransformInfo.cpp
This commit allows vectorized loops to be unrolled by a factor of 2 for AArch64.
2014-04-18 07:57:54 +00:00
CMakeLists.txt
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LLVMBuild.txt
LLVMBuild.txt: Add missing dependencies.
2014-04-10 11:16:47 +00:00
Makefile
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README.txt
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README.txt 

This file will contain changes that need to be made before AArch64 can become an
officially supported target. Currently a placeholder.