Daniel Sanders bfb9bab243 [mips][msa] Made the operand register sets optional for the BIT_[BHWD] formats ...

Their default is to be the same as the result register set.

No functional change



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190140 91177308-0d34-0410-b5e6-96231b3b80d8

2013-09-06 12:10:24 +00:00

..

Analysis

Revert: r189565 - Add getUnrollingPreferences to TTI

2013-08-29 03:33:15 +00:00

AsmParser

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Bitcode

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CodeGen

Debug Info: Use identifier to reference DIType in base type field of

2013-09-05 18:48:31 +00:00

DebugInfo

Add support for DebugFission to DWARF parser

2013-08-27 09:20:22 +00:00

ExecutionEngine

llvm interpreter: select, shuffle and insertelement instructions.

2013-09-02 06:40:09 +00:00

IR

Debug Info: Use identifier to reference DIType in base type field of

2013-09-05 18:48:31 +00:00

IRReader

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Linker

Error on linking appending globals with different unnamed_addr.

2013-09-04 15:33:34 +00:00

MC

Improve handling of .file, .include and .incbin directives to

2013-09-05 19:14:26 +00:00

Object

Move everything depending on Object/MachOFormat.h over to Support/MachO.h.

2013-09-01 04:28:48 +00:00

Option

Option parsing: support case-insensitive option matching.

2013-08-28 20:04:31 +00:00

Support

Move accelerator table defines and constants to Dwarf.h since

2013-09-05 18:20:16 +00:00

TableGen

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Target

[mips][msa] Made the operand register sets optional for the BIT_[BHWD] formats

2013-09-06 12:10:24 +00:00

Transforms

Use type helper functions.

2013-09-06 00:37:24 +00:00

CMakeLists.txt

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LLVMBuild.txt

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Makefile

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