Logo
Explore Mirrors Help
Sign In
6502/llvm-6502
1
0
Fork 0
You've already forked llvm-6502
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-08-06 05:26:33 +00:00
Code Issues Projects Releases Wiki Activity
Files
c076a9793936b140364671a5e39ee53bd266c6c3
llvm-6502/test/CodeGen
History
Dan Gohman 5743a3f201 Add nounwind keywords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78568 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 16:48:40 +00:00
..
Alpha
Make promotion in operation legalization for SETCC work correctly.
2009-07-17 05:16:04 +00:00
ARM
Add nounwind keywords.
2009-08-10 16:48:40 +00:00
Blackfin
Add support for READCYCLECOUNTER in Blackfin back-end.
2009-08-08 21:42:22 +00:00
CBackend
…
CellSPU
…
CPP
…
Generic
Remove the IA-64 backend.
2009-07-24 00:30:09 +00:00
Mips
Pass target triple string in to TargetMachine constructor.
2009-08-03 04:03:51 +00:00
MSP430
…
PIC16
this passes.
2009-08-06 03:55:49 +00:00
PowerPC
Make the big switch: Change MCSectionMachO to represent a section *semantically*
2009-08-10 01:39:42 +00:00
SPARC
…
SystemZ
Add testcases for reg-mem arithemtics added recently
2009-08-05 17:04:32 +00:00
Thumb
tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have.
2009-07-28 07:38:35 +00:00
Thumb2
Simplify RegScavenger::forward a bit more.
2009-08-08 13:18:47 +00:00
X86
Make the big switch: Change MCSectionMachO to represent a section *semantically*
2009-08-10 01:39:42 +00:00
XCore
Add extra SEXT pattern.
2009-08-02 22:45:24 +00:00
Powered by Gitea Version: 1.24.4 Page: 1237ms Template: 14ms
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API