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	http://llvm.org/bugs/show_bug.cgi?id=5149 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86543 91177308-0d34-0410-b5e6-96231b3b80d8
		
			
				
	
	
		
			141 lines
		
	
	
		
			5.3 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
			
		
		
	
	
			141 lines
		
	
	
		
			5.3 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
| //===-- MipsMachineFunctionInfo.h - Private data used for Mips ----*- C++ -*-=//
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| //
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| //                     The LLVM Compiler Infrastructure
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| //
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| // This file is distributed under the University of Illinois Open Source
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| // License. See LICENSE.TXT for details.
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| //
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| //===----------------------------------------------------------------------===//
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| //
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| // This file declares the Mips specific subclass of MachineFunctionInfo.
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| //
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| //===----------------------------------------------------------------------===//
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| 
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| #ifndef MIPS_MACHINE_FUNCTION_INFO_H
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| #define MIPS_MACHINE_FUNCTION_INFO_H
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| 
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| #include "llvm/ADT/SmallVector.h"
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| #include "llvm/ADT/VectorExtras.h"
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| #include "llvm/CodeGen/MachineFunction.h"
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| #include "llvm/CodeGen/MachineFrameInfo.h"
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| 
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| namespace llvm {
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| 
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| /// MipsFunctionInfo - This class is derived from MachineFunction private
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| /// Mips target-specific information for each MachineFunction.
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| class MipsFunctionInfo : public MachineFunctionInfo {
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| 
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| private:
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|   /// Holds for each function where on the stack the Frame Pointer must be 
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|   /// saved. This is used on Prologue and Epilogue to emit FP save/restore
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|   int FPStackOffset;
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| 
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|   /// Holds for each function where on the stack the Return Address must be 
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|   /// saved. This is used on Prologue and Epilogue to emit RA save/restore
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|   int RAStackOffset;
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| 
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|   /// At each function entry, two special bitmask directives must be emitted
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|   /// to help debugging, for CPU and FPU callee saved registers. Both need
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|   /// the negative offset from the final stack size and its higher registers
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|   /// location on the stack.
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|   int CPUTopSavedRegOff;
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|   int FPUTopSavedRegOff;
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| 
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|   /// MipsFIHolder - Holds a FrameIndex and it's Stack Pointer Offset
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|   struct MipsFIHolder {
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| 
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|     int FI;
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|     int SPOffset;
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| 
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|     MipsFIHolder(int FrameIndex, int StackPointerOffset)
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|       : FI(FrameIndex), SPOffset(StackPointerOffset) {}
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|   };
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| 
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|   /// When PIC is used the GP must be saved on the stack on the function 
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|   /// prologue and must be reloaded from this stack location after every 
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|   /// call. A reference to its stack location and frame index must be kept 
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|   /// to be used on emitPrologue and processFunctionBeforeFrameFinalized.
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|   MipsFIHolder GPHolder;
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| 
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|   /// On LowerFormalArguments the stack size is unknown, so the Stack
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|   /// Pointer Offset calculation of "not in register arguments" must be 
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|   /// postponed to emitPrologue. 
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|   SmallVector<MipsFIHolder, 16> FnLoadArgs;
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|   bool HasLoadArgs;
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| 
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|   // When VarArgs, we must write registers back to caller stack, preserving 
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|   // on register arguments. Since the stack size is unknown on 
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|   // LowerFormalArguments, the Stack Pointer Offset calculation must be
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|   // postponed to emitPrologue. 
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|   SmallVector<MipsFIHolder, 4> FnStoreVarArgs;
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|   bool HasStoreVarArgs;
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| 
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|   /// SRetReturnReg - Some subtargets require that sret lowering includes
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|   /// returning the value of the returned struct in a register. This field
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|   /// holds the virtual register into which the sret argument is passed.
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|   unsigned SRetReturnReg;
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| 
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|   /// GlobalBaseReg - keeps track of the virtual register initialized for
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|   /// use as the global base register. This is used for PIC in some PIC
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|   /// relocation models.
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|   unsigned GlobalBaseReg;
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| 
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| public:
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|   MipsFunctionInfo(MachineFunction& MF) 
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|   : FPStackOffset(0), RAStackOffset(0), CPUTopSavedRegOff(0), 
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|     FPUTopSavedRegOff(0), GPHolder(-1,-1), HasLoadArgs(false), 
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|     HasStoreVarArgs(false), SRetReturnReg(0), GlobalBaseReg(0)
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|   {}
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| 
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|   int getFPStackOffset() const { return FPStackOffset; }
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|   void setFPStackOffset(int Off) { FPStackOffset = Off; }
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| 
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|   int getRAStackOffset() const { return RAStackOffset; }
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|   void setRAStackOffset(int Off) { RAStackOffset = Off; }
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| 
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|   int getCPUTopSavedRegOff() const { return CPUTopSavedRegOff; }
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|   void setCPUTopSavedRegOff(int Off) { CPUTopSavedRegOff = Off; }
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| 
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|   int getFPUTopSavedRegOff() const { return FPUTopSavedRegOff; }
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|   void setFPUTopSavedRegOff(int Off) { FPUTopSavedRegOff = Off; }
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| 
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|   int getGPStackOffset() const { return GPHolder.SPOffset; }
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|   int getGPFI() const { return GPHolder.FI; }
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|   void setGPStackOffset(int Off) { GPHolder.SPOffset = Off; }
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|   void setGPFI(int FI) { GPHolder.FI = FI; }
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|   bool needGPSaveRestore() const { return GPHolder.SPOffset != -1; }
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| 
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|   bool hasLoadArgs() const { return HasLoadArgs; }
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|   bool hasStoreVarArgs() const { return HasStoreVarArgs; } 
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| 
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|   void recordLoadArgsFI(int FI, int SPOffset) {
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|     if (!HasLoadArgs) HasLoadArgs=true;
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|     FnLoadArgs.push_back(MipsFIHolder(FI, SPOffset));
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|   }
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|   void recordStoreVarArgsFI(int FI, int SPOffset) {
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|     if (!HasStoreVarArgs) HasStoreVarArgs=true;
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|     FnStoreVarArgs.push_back(MipsFIHolder(FI, SPOffset));
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|   }
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| 
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|   void adjustLoadArgsFI(MachineFrameInfo *MFI) const {
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|     if (!hasLoadArgs()) return;
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|     for (unsigned i = 0, e = FnLoadArgs.size(); i != e; ++i) 
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|       MFI->setObjectOffset( FnLoadArgs[i].FI, FnLoadArgs[i].SPOffset );
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|   }
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|   void adjustStoreVarArgsFI(MachineFrameInfo *MFI) const {
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|     if (!hasStoreVarArgs()) return; 
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|     for (unsigned i = 0, e = FnStoreVarArgs.size(); i != e; ++i) 
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|       MFI->setObjectOffset( FnStoreVarArgs[i].FI, FnStoreVarArgs[i].SPOffset );
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|   }
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| 
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|   unsigned getSRetReturnReg() const { return SRetReturnReg; }
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|   void setSRetReturnReg(unsigned Reg) { SRetReturnReg = Reg; }
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| 
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|   unsigned getGlobalBaseReg() const { return GlobalBaseReg; }
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|   void setGlobalBaseReg(unsigned Reg) { GlobalBaseReg = Reg; }
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| };
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| 
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| } // end of namespace llvm
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| 
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| #endif // MIPS_MACHINE_FUNCTION_INFO_H
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