Jim Grosbach c1922c72ad TableGen support for auto-generating assembly two-operand aliases.
Assembly matchers for instructions with a two-operand form. ARM is full
of these, for example:
  add {Rd}, Rn, Rm  // Rd is optional and is the same as Rn if omitted.

The property TwoOperandAliasConstraint on the instruction definition controls
when, and if, an alias will be formed. No explicit InstAlias definitions
are required.

rdar://11255754

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155172 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 23:59:23 +00:00
2012-04-17 17:21:17 +00:00
2012-04-17 17:21:17 +00:00
2012-04-03 23:09:22 +00:00
2012-03-20 13:12:38 +00:00

Low Level Virtual Machine (LLVM)
================================

This directory and its subdirectories contain source code for the Low Level
Virtual Machine, a toolkit for the construction of highly optimized compilers,
optimizers, and runtime environments.

LLVM is open source software. You may freely distribute it under the terms of
the license agreement found in LICENSE.txt.

Please see the HTML documentation provided in docs/index.html for further
assistance with LLVM.

If you're writing a package for LLVM, see docs/Packaging.html for our
suggestions.


Description
LLVM backend for 6502
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