llvm-6502/utils/TableGen
Bill Schmidt d35da5055b Recognize ValueType operands in source patterns for fast-isel.
Currently the fast-isel table generator recognizes registers, register
classes, and immediates for source pattern operands.  ValueType
operands are not recognized.  This is not a problem for existing
targets with fast-isel support, but will not work for targets like
PowerPC and SPARC that use types in source patterns.

The proposed patch allows ValueType operands and treats them in the
same manner as register classes.  There is no convenient way to map
from a ValueType to a register class, but there's no need to do so.
The table generator already requires that all types in the source
pattern be identical, and we know the register class of the output
operand already.  So we just assign that register class to any
ValueType operands we encounter.

No functional effect on existing targets.  Testing deferred until the
PowerPC target implements fast-isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182512 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-22 20:45:11 +00:00
..
AsmMatcherEmitter.cpp Handle tied sub-operands in AsmMatcherEmitter 2013-04-27 18:48:23 +00:00
AsmWriterEmitter.cpp
AsmWriterInst.cpp
AsmWriterInst.h
CallingConvEmitter.cpp
CMakeLists.txt Add TableGen ctags(1) emitter and helper script. 2013-03-21 23:40:38 +00:00
CodeEmitterGen.cpp
CodeGenDAGPatterns.cpp Allow types to be omitted in output patterns. 2013-03-24 19:37:00 +00:00
CodeGenDAGPatterns.h Make all unnamed RegisterClass TreePatternNodes typed MVT::i32. 2013-03-23 18:08:44 +00:00
CodeGenInstruction.cpp
CodeGenInstruction.h
CodeGenIntrinsics.h
CodeGenMapTable.cpp
CodeGenRegisters.cpp Add TargetRegisterInfo::getCoveringLanes(). 2013-05-16 18:03:08 +00:00
CodeGenRegisters.h Add TargetRegisterInfo::getCoveringLanes(). 2013-05-16 18:03:08 +00:00
CodeGenSchedule.cpp Machine model: verify well-formed processor resource groups. 2013-04-23 23:45:14 +00:00
CodeGenSchedule.h Machine model: verify well-formed processor resource groups. 2013-04-23 23:45:14 +00:00
CodeGenTarget.cpp Use ArrayRef<MVT::SimpleValueType> when possible. 2013-03-17 17:26:09 +00:00
CodeGenTarget.h Use ArrayRef<MVT::SimpleValueType> when possible. 2013-03-17 17:26:09 +00:00
CTagsEmitter.cpp Add TableGen ctags(1) emitter and helper script. 2013-03-21 23:40:38 +00:00
DAGISelEmitter.cpp
DAGISelMatcher.cpp
DAGISelMatcher.h
DAGISelMatcherEmitter.cpp
DAGISelMatcherGen.cpp Allow types to be omitted in output patterns. 2013-03-24 19:37:00 +00:00
DAGISelMatcherOpt.cpp
DFAPacketizerEmitter.cpp
DisassemblerEmitter.cpp
FastISelEmitter.cpp Recognize ValueType operands in source patterns for fast-isel. 2013-05-22 20:45:11 +00:00
FixedLenDecoderEmitter.cpp
InstrInfoEmitter.cpp
IntrinsicEmitter.cpp
LLVMBuild.txt
Makefile
OptParserEmitter.cpp
PseudoLoweringEmitter.cpp
RegisterInfoEmitter.cpp Add TargetRegisterInfo::getCoveringLanes(). 2013-05-16 18:03:08 +00:00
SequenceToOffsetTable.h
SetTheory.cpp
SetTheory.h
StringToOffsetTable.h
SubtargetEmitter.cpp Machine model: Generate table entries for super-resources. 2013-04-23 23:45:16 +00:00
TableGen.cpp Add TableGen ctags(1) emitter and helper script. 2013-03-21 23:40:38 +00:00
TableGenBackends.h Add TableGen ctags(1) emitter and helper script. 2013-03-21 23:40:38 +00:00
tdtags Add TableGen ctags(1) emitter and helper script. 2013-03-21 23:40:38 +00:00
TGValueTypes.cpp
X86DisassemblerShared.h
X86DisassemblerTables.cpp
X86DisassemblerTables.h
X86ModRMFilters.cpp
X86ModRMFilters.h
X86RecognizableInstr.cpp Add CLAC/STAC instruction encoding/decoding support 2013-04-11 04:52:28 +00:00
X86RecognizableInstr.h