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	shouldn't do AU.setPreservesCFG(), because even though CodeGen passes don't modify the LLVM IR CFG, they may modify the MachineFunction CFG, and passes like MachineLoop are registered with isCFGOnly set to true. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77691 91177308-0d34-0410-b5e6-96231b3b80d8
		
			
				
	
	
		
			65 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
			
		
		
	
	
			65 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
| //===- LazyLiveness.h - Lazy, CFG-invariant liveness information ----------===//
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| //
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| //                     The LLVM Compiler Infrastructure
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| //
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| // This file is distributed under the University of Illinois Open Source
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| // License. See LICENSE.TXT for details.
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| //
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| //===----------------------------------------------------------------------===//
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| //
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| // This pass implements a lazy liveness analysis as per "Fast Liveness Checking
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| // for SSA-form Programs," by Boissinot, et al.
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| //
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| //===----------------------------------------------------------------------===//
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| 
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| #ifndef LLVM_CODEGEN_LAZYLIVENESS_H
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| #define LLVM_CODEGEN_LAZYLIVENESS_H
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| 
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| #include "llvm/CodeGen/MachineFunctionPass.h"
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| #include "llvm/CodeGen/MachineDominators.h"
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| #include "llvm/ADT/DenseMap.h"
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| #include "llvm/ADT/DenseSet.h"
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| #include "llvm/ADT/SparseBitVector.h"
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| #include <vector>
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| 
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| namespace llvm {
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| 
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| class MachineRegisterInfo;
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| 
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| class LazyLiveness : public MachineFunctionPass {
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| public:
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|   static char ID; // Pass identification, replacement for typeid
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|   LazyLiveness() : MachineFunctionPass(&ID) { }
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|   
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|   void getAnalysisUsage(AnalysisUsage &AU) const {
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|     AU.setPreservesAll();
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|     AU.addRequired<MachineDominatorTree>();
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|     MachineFunctionPass::getAnalysisUsage(AU);
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|   }
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|   
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|   bool runOnMachineFunction(MachineFunction &mf);
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| 
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|   bool vregLiveIntoMBB(unsigned vreg, MachineBasicBlock* MBB);
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|   
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| private:
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|   void computeBackedgeChain(MachineFunction& mf, MachineBasicBlock* MBB);
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|   
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|   typedef std::pair<MachineBasicBlock*, MachineBasicBlock*> edge_t;
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|   
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|   MachineRegisterInfo* MRI;
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|   
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|   DenseMap<MachineBasicBlock*, unsigned> preorder;
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|   std::vector<MachineBasicBlock*> rev_preorder;
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|   DenseMap<MachineBasicBlock*, SparseBitVector<128> > rv;
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|   DenseMap<MachineBasicBlock*, SparseBitVector<128> > tv;
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|   DenseSet<edge_t> backedges;
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|   SparseBitVector<128> backedge_source;
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|   SparseBitVector<128> backedge_target;
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|   SparseBitVector<128> calculated;
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| };
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| 
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| }
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| 
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| #endif
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| 
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