mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-02-08 06:32:24 +00:00
8699f5390b
Modified library structure to deal with circular dependency between HexagonInstPrinter and HexagonMCInst. Adding encoding bits for add opcode. Adding llvm-mc tests. Removing unit tests. http://reviews.llvm.org/D5624 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220584 91177308-0d34-0410-b5e6-96231b3b80d8
51 lines
1.5 KiB
C++
51 lines
1.5 KiB
C++
//===-- HexagonMCTargetDesc.h - Hexagon Target Descriptions -----*- C++ -*-===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// This file provides Hexagon specific target descriptions.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCTARGETDESC_H
|
|
#define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCTARGETDESC_H
|
|
|
|
namespace llvm {
|
|
struct InstrItinerary;
|
|
struct InstrStage;
|
|
class MCCodeEmitter;
|
|
class MCContext;
|
|
class MCInstrInfo;
|
|
class MCRegisterInfo;
|
|
class MCSubtargetInfo;
|
|
class Target;
|
|
|
|
extern Target TheHexagonTarget;
|
|
|
|
MCCodeEmitter *createHexagonMCCodeEmitter(const MCInstrInfo &MCII,
|
|
const MCRegisterInfo &MRI,
|
|
const MCSubtargetInfo &MST,
|
|
MCContext &MCT);
|
|
|
|
} // End llvm namespace
|
|
|
|
// Define symbolic names for Hexagon registers. This defines a mapping from
|
|
// register name to register number.
|
|
//
|
|
#define GET_REGINFO_ENUM
|
|
#include "HexagonGenRegisterInfo.inc"
|
|
|
|
// Defines symbolic names for the Hexagon instructions.
|
|
//
|
|
#define GET_INSTRINFO_ENUM
|
|
#include "HexagonGenInstrInfo.inc"
|
|
|
|
#define GET_SUBTARGETINFO_ENUM
|
|
#include "HexagonGenSubtargetInfo.inc"
|
|
|
|
#endif
|