llvm-6502/test/MC/Disassembler
Johnny Chen c3281c10c9 A7.3 register encoding
Qd -> bit[12] == 0
    Qn -> bit[16] == 0
    Qm -> bit[0]  == 0

If one of these bits is 1, the instruction is UNDEFINED.

rdar://problem/9238399
rdar://problem/9238445


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128949 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05 22:57:07 +00:00
..
ARM A7.3 register encoding 2011-04-05 22:57:07 +00:00
MBlaze Teach the MBlaze disassembler to disassemble special purpose registers. 2010-12-20 21:18:04 +00:00
X86 Basic sanity checks to ensure that 2- and 3-byte 2011-03-15 01:32:46 +00:00