llvm-6502/test
Quentin Colombet c34693f6ef [DAGCombiner] Slice a big load in two loads when the element are next to each
other in memory and the target has paired load and performs post-isel loads
combining.

E.g., this optimization will transform something like this:
 a = load i64* addr
 b = trunc i64 a to i32
 c = lshr i64 a, 32
 d = trunc i64 c to i32

into:
 b = load i32* addr1
 d = load i32* addr2
Where addr1 = addr2 +/- sizeof(i32), if the target supports paired load and
performs post-isel loads combining.

One should overload TargetLowering::hasPairedLoad to provide this information.
The default is false.

<rdar://problem/14477220>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192471 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-11 18:01:14 +00:00
..
Analysis
Assembler
Bindings/Ocaml
Bitcode
BugPoint
CodeGen [DAGCombiner] Slice a big load in two loads when the element are next to each 2013-10-11 18:01:14 +00:00
DebugInfo Debug Info: In DIBuilder, the context field of subprogram is updated to use 2013-10-10 18:40:01 +00:00
ExecutionEngine
Feature
FileCheck Fix handling of CHECK-DAG inside of CHECK-LABEL. 2013-10-11 16:48:02 +00:00
Instrumentation
Integer
JitListener
Linker
LTO llvm/test/LTO should run also on cygwin. 2013-10-09 01:07:31 +00:00
MC [ARM] Fix FP ABI attributes with no VFP enabled. 2013-10-11 16:03:43 +00:00
Object
Other
TableGen
tools
Transforms Fix a bug in Dead Argument Elimination. 2013-10-09 17:21:44 +00:00
Unit
Verifier
YAMLParser
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh