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llvm-6502/test/CodeGen/ARM
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Jakob Stoklund Olesen c5041cac7d Implement ARMBaseInstrInfo::commuteInstruction() for MOVCCr. 
A MOVCCr instruction can be commuted by inverting the condition. This
can help reduce register pressure and remove unnecessary copies in some
cases.

<rdar://problem/11182914>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154033 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 18:23:42 +00:00
..
2006-11-10-CycleInDAG.ll
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2007-01-19-InfiniteLoop.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
2007-03-07-CombinerCrash.ll
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2007-03-13-InstrSched.ll
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2007-03-21-JoinIntervalsCrash.ll
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2007-03-27-RegScavengerAssert.ll
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2007-03-30-RegScavengerAssert.ll
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2007-04-02-RegScavengerAssert.ll
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2007-04-03-PEIBug.ll
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2007-04-03-UndefinedSymbol.ll
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2007-04-30-CombinerCrash.ll
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2007-05-03-BadPostIndexedLd.ll
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2007-05-07-tailmerge-1.ll
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2007-05-09-tailmerge-2.ll
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2007-05-14-InlineAsmCstCrash.ll
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2007-05-14-RegScavengerAssert.ll
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2007-05-22-tailmerge-3.ll
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2007-05-23-BadPreIndexedStore.ll
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2007-08-15-ReuseBug.ll
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2008-02-04-LocalRegAllocBug.ll
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2008-02-29-RegAllocLocal.ll
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2008-03-05-SxtInRegBug.ll
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2008-03-07-RegScavengerAssert.ll
Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.
2011-11-27 06:54:59 +00:00
2008-04-04-ScavengerAssert.ll
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2008-04-10-ScavengerAssert.ll
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2008-04-11-PHIofImpDef.ll
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2008-05-19-LiveIntervalsBug.ll
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2008-05-19-ScavengerAssert.ll
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2008-07-17-Fdiv.ll
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2008-07-24-CodeGenPrepCrash.ll
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2008-08-07-AsmPrintBug.ll
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2008-09-17-CoalescerBug.ll
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2008-11-18-ScavengerAssert.ll
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2009-02-16-SpillerBug.ll
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2009-02-22-SoftenFloatVaArg.ll
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2009-02-27-SpillerBug.ll
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2009-03-07-SpillerBug.ll
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2009-03-09-AddrModeBug.ll
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2009-04-06-AsmModifier.ll
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2009-04-08-AggregateAddr.ll
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2009-04-08-FloatUndef.ll
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2009-04-08-FREM.ll
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2009-04-09-RegScavengerAsm.ll
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2009-05-05-DAGCombineBug.ll
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2009-05-07-RegAllocLocal.ll
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2009-05-11-CodePlacementCrash.ll
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2009-05-18-InlineAsmMem.ll
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2009-06-02-ISelCrash.ll
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2009-06-04-MissingLiveIn.ll
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2009-06-15-RegScavengerAssert.ll
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2009-06-19-RegScavengerAssert.ll
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2009-06-22-CoalescerBug.ll
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2009-06-30-RegScavengerAssert2.ll
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2009-06-30-RegScavengerAssert3.ll
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2009-06-30-RegScavengerAssert4.ll
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2009-06-30-RegScavengerAssert5.ll
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2009-06-30-RegScavengerAssert.ll
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2009-07-01-CommuteBug.ll
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2009-07-09-asm-p-constraint.ll
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2009-07-18-RewriterBug.ll
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2009-07-22-ScavengerAssert.ll
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2009-07-22-SchedulerAssert.ll
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2009-07-29-VFP3Registers.ll
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2009-08-02-RegScavengerAssert-Neon.ll
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2009-08-04-RegScavengerAssert-2.ll
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2009-08-04-RegScavengerAssert.ll
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2009-08-15-RegScavenger-EarlyClobber.ll
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2009-08-15-RegScavengerAssert.ll
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2009-08-21-PostRAKill2.ll
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2009-08-21-PostRAKill3.ll
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2009-08-21-PostRAKill.ll
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2009-08-23-linkerprivate.ll
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2009-08-26-ScalarToVector.ll
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2009-08-27-ScalarToVector.ll
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2009-08-29-ExtractEltf32.ll
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2009-08-29-TooLongSplat.ll
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2009-08-31-LSDA-Name.ll
Convert tests to the new EH model.
2011-11-08 00:09:27 +00:00
2009-08-31-TwoRegShuffle.ll
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2009-09-09-AllOnes.ll
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2009-09-09-fpcmp-ole.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
2009-09-10-postdec.ll
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2009-09-13-InvalidSubreg.ll
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2009-09-13-InvalidSuperReg.ll
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2009-09-20-LiveIntervalsBug.ll
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2009-09-21-LiveVariablesBug.ll
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2009-09-22-LiveVariablesBug.ll
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2009-09-23-LiveVariablesBug.ll
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2009-09-24-spill-align.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
2009-09-27-CoalescerBug.ll
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2009-09-28-LdStOptiBug.ll
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2009-10-02-NEONSubregsBug.ll
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2009-10-16-Scope.ll
Add a new wrapper node for a DILexicalBlock that encapsulates it and a
2011-10-11 22:59:11 +00:00
2009-10-21-InvalidFNeg.ll
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2009-10-27-double-align.ll
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2009-10-30.ll
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2009-11-01-NeonMoves.ll
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2009-11-02-NegativeLane.ll
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2009-11-07-SubRegAsmPrinting.ll
Use vmov.f32 to materialize f32 consts on ARM. This relaxes constraints on
2012-03-15 18:49:02 +00:00
2009-11-13-CoalescerCrash.ll
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2009-11-13-ScavengerAssert2.ll
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2009-11-13-ScavengerAssert.ll
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2009-11-13-VRRewriterCrash.ll
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2009-11-30-LiveVariablesBug.ll
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2009-12-02-vtrn-undef.ll
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2010-03-04-eabi-fp-spill.ll
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2010-03-04-stm-undef-addr.ll
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2010-03-18-ldm-rtrn.ll
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2010-04-07-DbgValueOtherTargets.ll
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2010-04-09-NeonSelect.ll
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2010-04-13-v2f64SplitArg.ll
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2010-04-14-SplitVector.ll
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2010-04-15-ScavengerDebugValue.ll
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2010-05-14-IllegalType.ll
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2010-05-17-FastAllocCrash.ll
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2010-05-18-LocalAllocCrash.ll
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2010-05-18-PostIndexBug.ll
Tighten physical register invariants: Allocatable physical registers can
2012-02-14 18:51:53 +00:00
2010-05-19-Shuffles.ll
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2010-05-20-NEONSpillCrash.ll
RegAlloc superpass: includes phi elimination, coalescing, and scheduling.
2012-02-10 04:10:36 +00:00
2010-05-21-BuildVector.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
2010-06-11-vmovdrr-bitcast.ll
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2010-06-21-LdStMultipleBug.ll
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2010-06-21-nondarwin-tc.ll
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2010-06-25-Thumb2ITInvalidIterator.ll
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2010-06-29-PartialRedefFastAlloc.ll
Set correct <def,undef> flags when lowering REG_SEQUENCE.
2012-01-24 23:28:42 +00:00
2010-06-29-SubregImpDefs.ll
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2010-07-26-GlobalMerge.ll
Convert tests to the new EH model.
2011-11-08 00:09:27 +00:00
2010-08-04-EHCrash.ll
Convert tests to the new EH model.
2011-11-08 00:09:27 +00:00
2010-08-04-StackVariable.ll
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2010-09-21-OptCmpBug.ll
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2010-09-29-mc-asm-header-test.ll
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2010-10-19-mc-elf-objheader.ll
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2010-10-25-ifcvt-ldm.ll
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2010-11-15-SpillEarlyClobber.ll
Delete the 'standard' spiller with used the old spilling framework.
2011-11-12 23:29:02 +00:00
2010-11-29-PrologueBug.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
2010-11-30-reloc-movt.ll
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2010-12-07-PEIBug.ll
Use vmov.f32 to materialize f32 consts on ARM. This relaxes constraints on
2012-03-15 18:49:02 +00:00
2010-12-08-tpsoft.ll
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2010-12-15-elf-lcomm.ll
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2010-12-17-LocalStackSlotCrash.ll
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2011-01-19-MergedGlobalDbg.ll
Make GlobalMerge honor the preferred alignment on globals without an explicitly specified alignment.
2011-11-30 21:54:15 +00:00
2011-02-04-AntidepMultidef.ll
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2011-02-07-AntidepClobber.ll
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2011-03-10-DAGCombineCrash.ll
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2011-03-15-LdStMultipleBug.ll
Do trivial CSE of dead BBs during codegen preparation.
2012-03-04 10:46:01 +00:00
2011-03-23-PeepholeBug.ll
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2011-04-07-schediv.ll
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2011-04-11-MachineLICMBug.ll
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2011-04-12-AlignBug.ll
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2011-04-12-FastRegAlloc.ll
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2011-04-15-AndVFlagPeepholeBug.ll
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2011-04-15-RegisterCmpPeephole.ll
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2011-04-26-SchedTweak.ll
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2011-04-27-IfCvtBug.ll
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2011-05-04-MultipleLandingPadSuccs.ll
Convert tests to the new EH model.
2011-11-08 00:09:27 +00:00
2011-06-09-TailCallByVal.ll
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2011-06-16-TailCallByVal.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
2011-06-29-MergeGlobalsAlign.ll
Make GlobalMerge honor the preferred alignment on globals without an explicitly specified alignment.
2011-11-30 21:54:15 +00:00
2011-07-10-GlobalMergeBug.ll
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2011-08-02-MergedGlobalDbg.ll
Always use the string pool, even when it makes the .o larger. This may help
2011-10-28 05:29:47 +00:00
2011-08-12-vmovqqqq-pseudo.ll
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2011-08-25-ldmia_ret.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
2011-08-29-ldr_pre_imm.ll
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2011-08-29-SchedCycle.ll
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2011-09-09-OddVectorDivision.ll
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2011-09-19-cpsr.ll
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2011-09-28-CMovCombineBug.ll
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2011-10-26-ExpandUnalignedLoadCrash.ll
Don't try to form pre/post-indexed loads/stores until after LegalizeDAG runs. Fixes PR11029.
2011-11-12 00:35:34 +00:00
2011-10-26-memset-inline.ll
Lower mem-ops to unaligned i32/i16 load/stores on ARM where supported.
2011-11-08 18:56:23 +00:00
2011-10-26-memset-with-neon.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
2011-11-07-PromoteVectorLoadStore.ll
Make sure to expand SIGN_EXTEND_INREG for NEON vectors. PR11319, round 3.
2011-11-11 03:16:38 +00:00
2011-11-09-BitcastVectorDouble.ll
Add check so we don't try to perform an impossible transformation. Fixes issue from PR11319.
2011-11-09 22:25:12 +00:00
2011-11-09-IllegalVectorFPIntConvert.ll
Make sure we correctly unroll conversions between v2f64 and v2i32 on ARM.
2011-11-09 23:36:02 +00:00
2011-11-14-EarlyClobber.ll
Fix early-clobber handling in shrinkToUses.
2011-11-14 18:45:38 +00:00
2011-11-28-DAGCombineBug.ll
DAG combine should not increase alignment of loads / stores with alignment less
2011-11-28 20:42:56 +00:00
2011-11-29-128bitArithmetics.ll
Make sure DAGCombiner doesn't introduce multiple loads from the same memory location. PR10747, part 2.
2011-12-26 22:49:32 +00:00
2011-11-30-MergeAlignment.ll
Make GlobalMerge honor the preferred alignment on globals without an explicitly specified alignment.
2011-11-30 21:54:15 +00:00
2011-12-14-machine-sink.ll
Do not sink instruction, if it is not profitable.
2011-12-14 23:20:38 +00:00
2011-12-19-sjlj-clobber.ll
Mark ARM eh_sjlj_dispatchsetup as clobbering all registers. Radar 10567930.
2011-12-20 01:29:27 +00:00
2012-01-23-PostRA-LICM.ll
Fix PR11829. PostRA LICM was too aggressive.
2012-01-23 21:01:15 +00:00
2012-01-24-RegSequenceLiveRange.ll
Improve sub-register def handling in ProcessImplicitDefs.
2012-01-25 23:36:27 +00:00
2012-01-26-CoalescerBug.ll
Rewrite instruction operands in AdjustCopiesBackFrom. Fixes PR11861.
2012-01-27 00:05:42 +00:00
2012-01-26-CopyPropKills.ll
Clear kill flags before propagating a copy.
2012-01-26 17:52:15 +00:00
2012-02-01-CoalescerBug.ll
Move test/CodeGen/Generic/2012-02-01-CoalescerBug.ll to CodeGen/ARM, for now. It requires TARGETS=arm.
2012-02-02 11:44:58 +00:00
2012-03-05-FPSCR-bug.ll
Split fpscr into two registers: FPSCR and FPSCR_NZCV.
2012-03-06 00:19:55 +00:00
2012-03-13-DAGCombineBug.ll
DAG combine incorrectly optimize (i32 vextract (v4i16 load $addr), c) to
2012-03-13 22:00:52 +00:00
2012-03-26-FoldImmBug.ll
ARM has a peephole optimization which looks for a def / use pair. The def
2012-03-26 23:31:00 +00:00
2012-04-02-TwoAddrInstrCrash.ll
During two-address lowering, rescheduling an instruction does not untie
2012-04-02 19:58:43 +00:00
addrmode.ll
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aliases.ll
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align.ll
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alloca.ll
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argaddr.ll
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arguments2.ll
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arguments3.ll
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arguments4.ll
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arguments5.ll
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arguments6.ll
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arguments7.ll
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arguments8.ll
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arguments_f64_backfill.ll
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arguments-nosplit-double.ll
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arguments-nosplit-i64.ll
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arguments.ll
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arm-and-tst-peephole.ll
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arm-asm.ll
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arm-frameaddr.ll
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arm-modifier.ll
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arm-negative-stride.ll
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arm-returnaddr.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
armv4.ll
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atomic-64bit.ll
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atomic-cmp.ll
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atomic-load-store.ll
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atomic-op.ll
Fix a couple of copy-n-paste bugs. Noticed by George Russell!
2011-12-21 18:56:22 +00:00
available_externally.ll
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avoid-cpsr-rmw.ll
Thumb2 size reduction fix for tied operands of tMUL.
2012-02-24 00:33:36 +00:00
bfc.ll
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bfi.ll
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bfx.ll
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bic.ll
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bits.ll
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bswap-inline-asm.ll
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bx_fold.ll
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call_nolink.ll
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call-tc.ll
ARM target should allow codegenprep to duplicate ret instructions to enable tailcall opt. rdar://11140249
2012-03-30 01:24:39 +00:00
call.ll
Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.
2011-11-27 06:54:59 +00:00
carry.ll
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clz.ll
Manually upgrade the test suite to specify the flag to cttz and ctlz.
2011-12-12 11:59:10 +00:00
code-placement.ll
Added a late machine instruction copy propagation pass. This catches
2012-01-07 03:02:36 +00:00
commute-movcc.ll
Implement ARMBaseInstrInfo::commuteInstruction() for MOVCCr.
2012-04-04 18:23:42 +00:00
compare-call.ll
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constants.ll
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crash-greedy-v6.ll
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crash-greedy.ll
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crash-O0.ll
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crash.ll
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cse-call.ll
Handle regmasks in MachineCSE.
2012-02-28 02:08:50 +00:00
cse-libcalls.ll
Do trivial CSE of dead BBs during codegen preparation.
2012-03-04 10:46:01 +00:00
ctor_order.ll
Properly emit ctors / dtors with priorities into desired sections
2012-01-25 22:24:19 +00:00
ctors_dtors.ll
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ctz.ll
Manually upgrade the test suite to specify the flag to cttz and ctlz.
2011-12-12 11:59:10 +00:00
debug-info-arg.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
debug-info-blocks.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
debug-info-branch-folding.ll
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debug-info-d16-reg.ll
- Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function
2011-12-14 02:11:42 +00:00
debug-info-qreg.ll
Add an option to pad an uleb128 to MCObjectWriter and remove the uleb128 encoding from the DWARF asm printer.
2011-11-05 11:52:44 +00:00
debug-info-s16-reg.ll
Add an option to pad an uleb128 to MCObjectWriter and remove the uleb128 encoding from the DWARF asm printer.
2011-11-05 11:52:44 +00:00
debug-info-sreg2.ll
Make tests less sensitive to scheduling changes.
2012-02-23 17:19:34 +00:00
div.ll
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divmod.ll
Reenable use of divmod compiler_rt functions for iOS 5.0 and later.
2011-10-07 16:59:21 +00:00
dyn-stackalloc.ll
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eh-resume-darwin.ll
Convert tests to the new EH model.
2011-11-08 00:09:27 +00:00
ehabi-unwind.ll
An option to selectively enable part of ARM EHABI support.
2012-01-24 13:05:33 +00:00
elf-lcomm-align.ll
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extloadi1.ll
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fabss.ll
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fadds.ll
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fast-isel-binary.ll
[fast-isel] Add support for SUBs with non-legal types.
2012-02-08 02:45:44 +00:00
fast-isel-br-const.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-br-phi.ll
[fast-isel] HandlePHINodesInSuccessorBlocks() can promite i8 and i16 types too.
2012-02-04 00:39:19 +00:00
fast-isel-call.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-cmp-imm.ll
[fast-isel] Address Eli's comments for r152847. Specifically, add a test case
2012-03-15 22:54:20 +00:00
fast-isel-conversion.ll
[fast-isel] Add support for FPToUI. Also add test cases for FPToSI.
2012-02-03 20:27:51 +00:00
fast-isel-crash2.ll
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fast-isel-crash.ll
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fast-isel-deadcode.ll
Reapply r146997, "Heed spill slot alignment on ARM."
2012-01-05 00:26:57 +00:00
fast-isel-fold.ll
Add support for emitting both signed- and zero-extend loads. Fix
2011-11-13 02:23:59 +00:00
fast-isel-GEP-coalesce.ll
When fast iseling a GEP, accumulate the offset rather than emitting a series of
2011-11-17 07:15:58 +00:00
fast-isel-icmp.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-indirectbr.ll
[fast-isel] Add support for indirect branches.
2012-02-07 23:56:08 +00:00
fast-isel-intrinsic.ll
Use getRegForValue() to materialize the address of ARM globals.
2012-01-07 04:07:22 +00:00
fast-isel-ldr-str-arm.ll
Add newline to end of file. Thanks, Eli.
2011-11-14 22:48:33 +00:00
fast-isel-ldr-str-thumb-neg-index.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-ldrh-strh-arm.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-mvn.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-pred.ll
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fast-isel-redefinition.ll
RegAlloc superpass: includes phi elimination, coalescing, and scheduling.
2012-02-10 04:10:36 +00:00
fast-isel-ret.ll
[fast-isel] Add support for returning non-legal types with no sign- or zero-
2012-02-17 01:21:28 +00:00
fast-isel-select.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-static.ll
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fast-isel.ll
[fast-isel] Fold "urem x, pow2" -> "and x, pow2-1". This should fix the 271%
2012-03-22 00:21:17 +00:00
fcopysign.ll
Make tests less sensitive to scheduling changes.
2012-02-23 17:19:34 +00:00
fdivs.ll
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fixunsdfdi.ll
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flag-crash.ll
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fmacs.ll
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fmdrr-fmrrd.ll
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fmscs.ll
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fmuls.ll
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fnegs.ll
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fnmacs.ll
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fnmscs.ll
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fnmul.ll
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fnmuls.ll
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fold-const.ll
Manually upgrade the test suite to specify the flag to cttz and ctlz.
2011-12-12 11:59:10 +00:00
formal.ll
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fp16.ll
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fp_convert.ll
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fp-arg-shuffle.ll
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fp.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
fparith.ll
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fpcmp_ueq.ll
ARM case-insensitive checking for APSR_nzcv.
2012-03-15 21:34:14 +00:00
fpcmp-opt.ll
ARM case-insensitive checking for APSR_nzcv.
2012-03-15 21:34:14 +00:00
fpcmp.ll
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fpconsts.ll
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fpconv.ll
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fpmem.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
fpow.ll
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fpowi.ll
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fptoint.ll
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fsubs.ll
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fusedMAC.ll
updated patch for the ARM fused multiply add/sub
2012-03-05 17:39:52 +00:00
global-merge.ll
Make GlobalMerge honor the preferred alignment on globals without an explicitly specified alignment.
2011-11-30 21:54:15 +00:00
globals.ll
Align ARM constant pool islands via their basic block.
2011-12-06 01:43:02 +00:00
gv-stubs-crash.ll
Check the visibility of the global variable before placing it into the stubs
2011-10-24 23:05:43 +00:00
hardfloat_neon.ll
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hello.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
hidden-vis-2.ll
ARM Darwin default relocation model is PIC.
2011-09-30 17:41:35 +00:00
hidden-vis-3.ll
ARM Darwin default relocation model is PIC.
2011-09-30 17:41:35 +00:00
hidden-vis.ll
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iabs.ll
Reapply r141365 now that PR11107 is fixed.
2011-10-10 22:59:55 +00:00
ifcvt1.ll
Move tests to FileCheck.
2011-12-19 23:26:44 +00:00
ifcvt2.ll
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ifcvt3.ll
Move tests to FileCheck.
2011-12-19 23:26:44 +00:00
ifcvt4.ll
…
ifcvt5.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
ifcvt6.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
ifcvt7.ll
…
ifcvt8.ll
…
ifcvt9.ll
…
ifcvt10.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
ifcvt11.ll
ARM case-insensitive checking for APSR_nzcv.
2012-03-15 21:34:14 +00:00
illegal-vector-bitcast.ll
…
imm.ll
…
indirectbr.ll
…
inlineasm2.ll
…
inlineasm3.ll
Implement 'e' and 'f' modifiers for Neon inline asm. <rdar://problem/10551006>
2011-12-12 21:45:15 +00:00
inlineasm4.ll
…
inlineasm-imm-arm.ll
…
inlineasm.ll
…
insn-sched1.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
int-to-fp.ll
…
intrinsics.ll
…
ispositive.ll
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jumptable-label.ll
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large-stack.ll
…
ldm.ll
…
ldr_ext.ll
…
ldr_frame.ll
…
ldr_post.ll
…
ldr_pre.ll
…
ldr.ll
…
ldrd-memoper.ll
Preserve MachineMemOperands in ARMLoadStoreOptimizer.
2011-11-11 22:18:09 +00:00
ldrd.ll
Allocate virtual registers in ascending order.
2012-04-02 22:30:39 +00:00
ldst-f32-2-i32.ll
…
ldstrexd.ll
…
lit.local.cfg
Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu
2012-03-25 09:02:19 +00:00
load_i1_select.ll
When emitting a cmp with 0 for a lowered select, mask out the high
2012-02-24 00:09:36 +00:00
load-global.ll
…
load.ll
…
log2_not_readnone.ll
Revert r151816 as Jim has the appropriate fix.
2012-03-01 17:41:19 +00:00
long_shift.ll
- Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function
2011-12-14 02:11:42 +00:00
long-setcc.ll
…
long.ll
…
lsr-code-insertion.ll
…
lsr-scale-addr-mode.ll
…
lsr-unfolded-offset.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
machine-cse-cmp.ll
Implement ARMBaseInstrInfo::commuteInstruction() for MOVCCr.
2012-04-04 18:23:42 +00:00
machine-licm.ll
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mem.ll
…
memcpy-inline.ll
Delete stale comment.
2011-11-14 18:03:05 +00:00
memfunc.ll
Proper support for a bastardized darwin-eabi hybird ABI.
2012-02-21 20:46:00 +00:00
mls.ll
…
movt-movw-global.ll
…
movt.ll
…
mul_const.ll
Perform mul combine when multiplying wiht negative constants.
2012-03-19 19:19:50 +00:00
mul.ll
…
mulhi.ll
…
mult-alt-generic-arm.ll
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mvn.ll
…
neon_arith1.ll
…
neon_div.ll
…
neon_ld1.ll
FileCheckize.
2011-11-29 23:09:16 +00:00
neon_ld2.ll
FileCheckize.
2011-11-29 23:09:16 +00:00
neon_minmax.ll
…
neon_shift.ll
…
neon_spill.ll
Add <imp-def> operands when reloading into physregs.
2012-03-06 02:48:17 +00:00
odr_comdat.ll
test commit. removing unnecessary whitespace.
2012-02-24 13:52:45 +00:00
pack.ll
…
peephole-bitcast.ll
XFAIL test that depends on linear scan to remove dead code.
2011-11-12 22:39:30 +00:00
phi.ll
…
pr3502.ll
…
prefetch.ll
…
private.ll
…
reg_asc_order.ll
Allocate virtual registers in ascending order.
2012-04-02 22:30:39 +00:00
reg_sequence.ll
This commit contains a few changes that had to go in together.
2012-04-01 19:31:22 +00:00
ret0.ll
…
ret_arg1.ll
…
ret_arg2.ll
…
ret_arg3.ll
…
ret_arg4.ll
…
ret_arg5.ll
…
ret_f32_arg2.ll
…
ret_f32_arg5.ll
…
ret_f64_arg2.ll
…
ret_f64_arg_reg_split.ll
…
ret_f64_arg_split.ll
…
ret_f64_arg_stack.ll
…
ret_i64_arg2.ll
…
ret_i64_arg3.ll
…
ret_i64_arg_split.ll
…
ret_i128_arg2.ll
…
ret_void.ll
…
rev.ll
Canonicalize (srl (bswap x), 16) to (rotr (bswap x), 16) if the high 16 bits
2012-02-23 02:58:19 +00:00
sbfx.ll
…
section.ll
…
select_xform.ll
Fix test case from r153135.
2012-03-20 21:49:54 +00:00
select-imm.ll
Implement ARMBaseInstrInfo::commuteInstruction() for MOVCCr.
2012-04-04 18:23:42 +00:00
select.ll
Allocate virtual registers in ascending order.
2012-04-02 22:30:39 +00:00
shifter_operand.ll
Extend r148086 to check for [r +/- reg] address mode. This fixes queens performance regression (due to increased register pressure from overly aggressive pre-inc formation).
2012-03-06 23:33:32 +00:00
shuffle.ll
…
smul.ll
…
spill-q.ll
Enable aligned NEON spilling by default.
2012-01-06 22:19:37 +00:00
stack-frame.ll
…
stm.ll
…
str_post.ll
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str_pre-2.ll
Linear scan is going away.
2011-11-12 22:39:34 +00:00
str_pre.ll
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str_trunc.ll
…
sub.ll
…
subreg-remat.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
sxt_rot.ll
…
t2-imm.ll
…
tail-dup.ll
Replace the use of isPredicable() with isPredicated() in
2012-01-26 18:24:25 +00:00
tail-opts.ll
ARM Darwin default relocation model is PIC.
2011-09-30 17:41:35 +00:00
test-sharedidx.ll
test/CodeGen/ARM/test-sharedidx.ll: Fix for -Asserts.
2012-01-13 07:03:55 +00:00
thread_pointer.ll
…
thumb1-varalloc.ll
…
thumb2-it-block.ll
Test simplification that Ana Pazos noticed.
2011-10-11 04:43:15 +00:00
tls1.ll
…
tls2.ll
…
tls3.ll
…
trap.ll
…
trunc_ldr.ll
…
truncstore-dag-combine.ll
…
tst_teq.ll
…
uint64tof64.ll
…
umulo-32.ll
…
unaligned_load_store.ll
…
undef-sext.ll
…
unord.ll
…
uxt_rot.ll
…
uxtb.ll
…
va_arg.ll
Make this test less sensitive to codegen optimizations.
2011-10-05 18:13:08 +00:00
vaba.ll
…
vabd.ll
…
vabs.ll
…
vadd.ll
…
vargs_align.ll
…
vargs.ll
…
vbits.ll
…
vbsl-constant.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
vbsl.ll
…
vceq.ll
…
vcge.ll
…
vcgt.ll
…
vcnt.ll
…
vcombine.ll
…
vcvt_combine.ll
…
vcvt.ll
…
vdiv_combine.ll
…
vdup.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
vector-DAGCombine.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
vext.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
vfcmp.ll
…
vfp.ll
…
vget_lane.ll
…
vhadd.ll
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vhsub.ll
…
vicmp.ll
…
vld1.ll
…
vld2.ll
…
vld3.ll
…
vld4.ll
…
vlddup.ll
Also set addrmode6 alignment when align==size.
2011-10-27 22:39:16 +00:00
vldlane.ll
Also set addrmode6 alignment when align==size.
2011-10-27 22:39:16 +00:00
vminmax.ll
…
vmla.ll
…
vmls.ll
…
vmov.ll
ARM vector any_extends need to be selected to vmovl. <rdar://problem/10723651>
2012-01-20 20:59:56 +00:00
vmul.ll
Fix incorrect check for sign-extended constant BUILD_VECTOR.
2011-10-18 17:34:51 +00:00
vneg.ll
…
vpadal.ll
…
vpadd.ll
…
vpminmax.ll
…
vqadd.ll
…
vqdmul.ll
…
vqshl.ll
…
vqshrn.ll
…
vqsub.ll
…
vrec.ll
…
vrev.ll
Add CHECKs and document PR11158.
2011-10-17 20:23:23 +00:00
vshift.ll
…
vshiftins.ll
…
vshl.ll
…
vshll.ll
…
vshrn.ll
…
vsra.ll
…
vst1.ll
…
vst2.ll
VST2 four-register w/ update pseudos for fixed/register update.
2012-01-20 19:16:00 +00:00
vst3.ll
…
vst4.ll
…
vstlane.ll
Also set addrmode6 alignment when align==size.
2011-10-27 22:39:16 +00:00
vsub.ll
…
vtbl.ll
…
vtrn.ll
…
vuzp.ll
…
vzip.ll
…
weak2.ll
…
weak.ll
…
widen-vmovs.ll
Change the constant in this testcase so that it results in a constant pool
2012-03-29 23:52:38 +00:00