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	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5204 91177308-0d34-0410-b5e6-96231b3b80d8
		
			
				
	
	
		
			255 lines
		
	
	
		
			8.4 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
			
		
		
	
	
			255 lines
		
	
	
		
			8.4 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
//===-- SchedInfo.cpp - Generic code to support target schedulers ----------==//
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//
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// This file implements the generic part of a Scheduler description for a
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// target.  This functionality is defined in the llvm/Target/SchedInfo.h file.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Target/TargetSchedInfo.h"
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#include "llvm/Target/TargetMachine.h"
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resourceId_t MachineResource::nextId = 0;
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// Check if fromRVec and toRVec have *any* common entries.
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// Assume the vectors are sorted in increasing order.
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// Algorithm copied from function set_intersection() for sorted ranges
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// (stl_algo.h).
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//
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inline static bool
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RUConflict(const std::vector<resourceId_t>& fromRVec,
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	   const std::vector<resourceId_t>& toRVec)
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{
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  unsigned fN = fromRVec.size(), tN = toRVec.size(); 
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  unsigned fi = 0, ti = 0;
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  while (fi < fN && ti < tN)
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    {
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      if (fromRVec[fi] < toRVec[ti])
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	++fi;
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      else if (toRVec[ti] < fromRVec[fi])
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	++ti;
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      else
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	return true;
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    }
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  return false;
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}
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static cycles_t
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ComputeMinGap(const InstrRUsage &fromRU, 
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	      const InstrRUsage &toRU)
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{
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  cycles_t minGap = 0;
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  if (fromRU.numBubbles > 0)
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    minGap = fromRU.numBubbles;
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  if (minGap < fromRU.numCycles)
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    {
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      // only need to check from cycle `minGap' onwards
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      for (cycles_t gap=minGap; gap <= fromRU.numCycles-1; gap++)
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	{
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	  // check if instr. #2 can start executing `gap' cycles after #1
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	  // by checking for resource conflicts in each overlapping cycle
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	  cycles_t numOverlap =std::min(fromRU.numCycles - gap, toRU.numCycles);
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	  for (cycles_t c = 0; c <= numOverlap-1; c++)
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	    if (RUConflict(fromRU.resourcesByCycle[gap + c],
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			   toRU.resourcesByCycle[c]))
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	      {
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		// conflict found so minGap must be more than `gap'
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		minGap = gap+1;
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		break;
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	      }
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	}
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    }
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  return minGap;
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}
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//---------------------------------------------------------------------------
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// class TargetSchedInfo
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//	Interface to machine description for instruction scheduling
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//---------------------------------------------------------------------------
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TargetSchedInfo::TargetSchedInfo(const TargetMachine&    tgt,
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                                 int                     NumSchedClasses,
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                                 const InstrClassRUsage* ClassRUsages,
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                                 const InstrRUsageDelta* UsageDeltas,
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                                 const InstrIssueDelta*  IssueDeltas,
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                                 unsigned NumUsageDeltas,
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                                 unsigned NumIssueDeltas)
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  : target(tgt),
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    numSchedClasses(NumSchedClasses), mii(& tgt.getInstrInfo()),
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    classRUsages(ClassRUsages), usageDeltas(UsageDeltas),
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    issueDeltas(IssueDeltas), numUsageDeltas(NumUsageDeltas),
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    numIssueDeltas(NumIssueDeltas)
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{}
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void
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TargetSchedInfo::initializeResources()
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{
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  assert(MAX_NUM_SLOTS >= (int)getMaxNumIssueTotal()
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	 && "Insufficient slots for static data! Increase MAX_NUM_SLOTS");
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  // First, compute common resource usage info for each class because
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  // most instructions will probably behave the same as their class.
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  // Cannot allocate a vector of InstrRUsage so new each one.
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  // 
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  std::vector<InstrRUsage> instrRUForClasses;
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  instrRUForClasses.resize(numSchedClasses);
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  for (InstrSchedClass sc = 0; sc < numSchedClasses; sc++) {
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    // instrRUForClasses.push_back(new InstrRUsage);
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    instrRUForClasses[sc].setMaxSlots(getMaxNumIssueTotal());
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    instrRUForClasses[sc].setTo(classRUsages[sc]);
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  }
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  computeInstrResources(instrRUForClasses);
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  computeIssueGaps(instrRUForClasses);
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}
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void
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TargetSchedInfo::computeInstrResources(const std::vector<InstrRUsage>&
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					instrRUForClasses)
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{
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  int numOpCodes =  mii->getNumRealOpCodes();
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  instrRUsages.resize(numOpCodes);
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  // First get the resource usage information from the class resource usages.
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  for (MachineOpCode op = 0; op < numOpCodes; ++op) {
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    InstrSchedClass sc = getSchedClass(op);
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    assert(sc < numSchedClasses);
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    instrRUsages[op] = instrRUForClasses[sc];
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  }
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  // Now, modify the resource usages as specified in the deltas.
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  for (unsigned i = 0; i < numUsageDeltas; ++i) {
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    MachineOpCode op = usageDeltas[i].opCode;
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    assert(op < numOpCodes);
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    instrRUsages[op].addUsageDelta(usageDeltas[i]);
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  }
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  // Then modify the issue restrictions as specified in the deltas.
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  for (unsigned i = 0; i < numIssueDeltas; ++i) {
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    MachineOpCode op = issueDeltas[i].opCode;
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    assert(op < numOpCodes);
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    instrRUsages[issueDeltas[i].opCode].addIssueDelta(issueDeltas[i]);
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  }
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}
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void
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TargetSchedInfo::computeIssueGaps(const std::vector<InstrRUsage>&
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				   instrRUForClasses)
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{
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  int numOpCodes =  mii->getNumRealOpCodes();
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  issueGaps.resize(numOpCodes);
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  conflictLists.resize(numOpCodes);
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  assert(numOpCodes < (1 << MAX_OPCODE_SIZE) - 1
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         && "numOpCodes invalid for implementation of class OpCodePair!");
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  // First, compute issue gaps between pairs of classes based on common
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  // resources usages for each class, because most instruction pairs will
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  // usually behave the same as their class.
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  // 
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  int classPairGaps[numSchedClasses][numSchedClasses];
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  for (InstrSchedClass fromSC=0; fromSC < numSchedClasses; fromSC++)
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    for (InstrSchedClass toSC=0; toSC < numSchedClasses; toSC++)
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      {
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	int classPairGap = ComputeMinGap(instrRUForClasses[fromSC],
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					 instrRUForClasses[toSC]);
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	classPairGaps[fromSC][toSC] = classPairGap; 
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      }
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  // Now, for each pair of instructions, use the class pair gap if both
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  // instructions have identical resource usage as their respective classes.
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  // If not, recompute the gap for the pair from scratch.
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  longestIssueConflict = 0;
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  for (MachineOpCode fromOp=0; fromOp < numOpCodes; fromOp++)
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    for (MachineOpCode toOp=0; toOp < numOpCodes; toOp++)
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      {
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        int instrPairGap = 
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          (instrRUsages[fromOp].sameAsClass && instrRUsages[toOp].sameAsClass)
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          ? classPairGaps[getSchedClass(fromOp)][getSchedClass(toOp)]
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          : ComputeMinGap(instrRUsages[fromOp], instrRUsages[toOp]);
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        if (instrPairGap > 0)
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          {
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            this->setGap(instrPairGap, fromOp, toOp);
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            conflictLists[fromOp].push_back(toOp);
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            longestIssueConflict=std::max(longestIssueConflict, instrPairGap);
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          }
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      }
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}
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void InstrRUsage::setTo(const InstrClassRUsage& classRU) {
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  sameAsClass	= true;
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  isSingleIssue = classRU.isSingleIssue;
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  breaksGroup   = classRU.breaksGroup; 
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  numBubbles    = classRU.numBubbles;
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  for (unsigned i=0; i < classRU.numSlots; i++)
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    {
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      unsigned slot = classRU.feasibleSlots[i];
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      assert(slot < feasibleSlots.size() && "Invalid slot specified!");
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      this->feasibleSlots[slot] = true;
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    }
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  numCycles   = classRU.totCycles;
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  resourcesByCycle.resize(this->numCycles);
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  for (unsigned i=0; i < classRU.numRUEntries; i++)
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    for (unsigned c=classRU.V[i].startCycle, NC = c + classRU.V[i].numCycles;
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	 c < NC; c++)
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      this->resourcesByCycle[c].push_back(classRU.V[i].resourceId);
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  // Sort each resource usage vector by resourceId_t to speed up conflict checking
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  for (unsigned i=0; i < this->resourcesByCycle.size(); i++)
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    sort(resourcesByCycle[i].begin(), resourcesByCycle[i].end());
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}
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// Add the extra resource usage requirements specified in the delta.
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// Note that a negative value of `numCycles' means one entry for that
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// resource should be deleted for each cycle.
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// 
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void InstrRUsage::addUsageDelta(const InstrRUsageDelta &delta) {
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  int NC = delta.numCycles;
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  sameAsClass = false;
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  // resize the resources vector if more cycles are specified
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  unsigned maxCycles = this->numCycles;
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  maxCycles = std::max(maxCycles, delta.startCycle + abs(NC) - 1);
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  if (maxCycles > this->numCycles)
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    {
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      this->resourcesByCycle.resize(maxCycles);
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      this->numCycles = maxCycles;
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    }
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  if (NC >= 0)
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    for (unsigned c=delta.startCycle, last=c+NC-1; c <= last; c++)
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      this->resourcesByCycle[c].push_back(delta.resourceId);
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  else
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    // Remove the resource from all NC cycles.
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    for (unsigned c=delta.startCycle, last=(c-NC)-1; c <= last; c++)
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      {
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	// Look for the resource backwards so we remove the last entry
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	// for that resource in each cycle.
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	std::vector<resourceId_t>& rvec = this->resourcesByCycle[c];
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	int r;
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	for (r = (int) rvec.size(); r >= 0; r--)
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	  if (rvec[r] == delta.resourceId)
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	    {// found last entry for the resource
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	      rvec.erase(rvec.begin() + r);
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	      break;
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	    }
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	assert(r >= 0 && "Resource to remove was unused in cycle c!");
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      }
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}
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