llvm-6502/test/MC
Johnny Chen c584e317e9 ARM disassembler was erroneously accepting an invalid LSL instruction.
For register-controlled shifts, we should check that the encoding constraint
Inst{7} = 0 and Inst{4} = 1 is satisfied.

rdar://problem/9237693


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128941 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05 21:49:44 +00:00
..
ARM Constants with multiple encodings (ARM): 2011-04-05 18:02:46 +00:00
AsmParser Adding a test for "-inf" as well. 2011-03-29 21:54:10 +00:00
COFF
Disassembler ARM disassembler was erroneously accepting an invalid LSL instruction. 2011-04-05 21:49:44 +00:00
ELF
MachO MC: Add support for disabling "temporary label" behavior. Useful for debugging 2011-03-28 22:49:15 +00:00
MBlaze
X86 Add support for the VIA PadLock instructions. 2011-04-04 16:58:13 +00:00