Bruno Cardoso Lopes 2ac8111159 Add support for breaking 256-bit int VETCC into two 128-bit ones, ...

avoding scalarization of the compare. Reduces code from 59 to 6
instructions. Fix PR10712.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138271 91177308-0d34-0410-b5e6-96231b3b80d8

2011-08-22 20:31:04 +00:00

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Alpha

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ARM

With the fix in r138164: "Add <imp-def> operands to QQ and QQQQ stack loads."

2011-08-20 00:34:45 +00:00

Blackfin

more tests not making the jump into the brave new world.

2011-07-09 16:57:10 +00:00

CBackend

Revert r137134. It breaks some code as Eli pointed out.

2011-08-09 18:56:35 +00:00

CellSPU

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CPP

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Generic

Comment correction.

2011-07-12 03:39:22 +00:00

MBlaze

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Mips

Use subword loads instead of a 4-byte load when the size of a structure (or a

2011-08-18 23:39:37 +00:00

MSP430

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PowerPC

Add MCObjectFileInfo and sink the MCSections initialization code from

2011-07-20 05:58:47 +00:00

PTX

PTX: Add initial support for device function calls

2011-08-09 17:36:31 +00:00

SPARC

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SystemZ

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Thumb

Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.

2011-07-07 03:55:05 +00:00

Thumb2

Update tests.

2011-08-19 22:19:48 +00:00

X86

Add support for breaking 256-bit int VETCC into two 128-bit ones,

2011-08-22 20:31:04 +00:00

XCore

Add intrinsics for SETEV, GETED, GETET.

2011-08-18 13:00:48 +00:00