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https://github.com/c64scene-ar/llvm-6502.git
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eee962e1ce
in addition to integer expressions. Rewrite GetOrEnforceKnownAlignment as a ComputeMaskedBits problem, moving all of its special alignment knowledge to ComputeMaskedBits as low-zero-bits knowledge. Also, teach ComputeMaskedBits a few basic things about Mul and PHI instructions. This improves ComputeMaskedBits-based simplifications in a few cases, but more noticeably it significantly improves instcombine's alignment detection for loads, stores, and memory intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49492 91177308-0d34-0410-b5e6-96231b3b80d8
31 lines
863 B
LLVM
31 lines
863 B
LLVM
; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {align 16} | count 1
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; Instcombine should be able to prove vector alignment in the
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; presence of a few mild address computation tricks.
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define void @foo(i8* %b, i64 %n, i64 %u, i64 %y) nounwind {
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entry:
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%c = ptrtoint i8* %b to i64
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%d = and i64 %c, -16
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%e = inttoptr i64 %d to double*
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%v = mul i64 %u, 2
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%z = and i64 %y, -2
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%t1421 = icmp eq i64 %n, 0
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br i1 %t1421, label %return, label %bb
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bb:
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%i = phi i64 [ %indvar.next, %bb ], [ 20, %entry ]
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%j = mul i64 %i, %v
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%h = add i64 %j, %z
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%t8 = getelementptr double* %e, i64 %h
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%p = bitcast double* %t8 to <2 x double>*
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store <2 x double><double 0.0, double 0.0>, <2 x double>* %p, align 8
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%indvar.next = add i64 %i, 1
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%exitcond = icmp eq i64 %indvar.next, %n
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br i1 %exitcond, label %return, label %bb
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return:
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ret void
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}
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