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arm-LDREXD-reencoding.txt
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ARM: Fix STREX/LDREX reecoding
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2013-06-11 08:03:20 +00:00 |
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arm-STREXD-reencoding.txt
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ARM: Fix STREX/LDREX reecoding
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2013-06-11 08:03:20 +00:00 |
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arm-tests.txt
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This reverts r155000.
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2013-06-20 17:42:36 +00:00 |
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arm-thumb-trustzone.txt
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ARM: Make "SMC" instructions conditional on new TrustZone architecture feature.
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2013-04-10 12:08:35 +00:00 |
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arm-trustzone.txt
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ARM: Make "SMC" instructions conditional on new TrustZone architecture feature.
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2013-04-10 12:08:35 +00:00 |
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basic-arm-instructions.txt
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ARM: ISB cannot be passed the same options as DMB
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2013-06-10 14:17:08 +00:00 |
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fp-encoding.txt
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This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These are optional registers that may be supported some ARM implementations to aid with resolution of floating point exceptions. The manual pages for vmsr and vmrs do not detail their use. Encodings and other information can be found in ARM Architecture Reference Manual section F, chapter 6, paragraph 3.
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2013-06-11 09:39:51 +00:00 |
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hex-immediates.txt
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invalid-Bcc-thumb.txt
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invalid-BFI-arm.txt
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invalid-CDP2-arm.txt
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This reverts r155000.
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2013-06-20 17:42:36 +00:00 |
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invalid-CPS2p-arm.txt
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invalid-CPS3p-arm.txt
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invalid-CPS-arm.txt
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ARM: fix CPS decoding when ambiguous with QADD
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2013-06-08 13:38:52 +00:00 |
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invalid-DMB-thumb.txt
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invalid-DSB-arm.txt
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invalid-FSTMX-arm.txt
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ARM: add fstmx and fldmx instructions for assembly
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2013-05-31 15:55:51 +00:00 |
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invalid-hint-arm.txt
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ARM: Fix encoding of hint instruction for Thumb.
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2013-04-26 17:54:54 +00:00 |
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invalid-hint-thumb.txt
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ARM: Fix encoding of hint instruction for Thumb.
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2013-04-26 17:54:54 +00:00 |
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invalid-IT-CBNZ-thumb.txt
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invalid-IT-CC15.txt
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invalid-IT-thumb.txt
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ARM: fix IT decoding
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2013-06-24 09:11:45 +00:00 |
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invalid-LDC-form-arm.txt
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invalid-LDM-thumb.txt
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invalid-LDR_POST-arm.txt
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s tightens up the encoding description for ARM post-indexed ldr instructions. All instructions in this class have bit 4 cleared. It turns out that there is a test case for this, but it was marked XFAIL.
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2013-04-30 09:00:12 +00:00 |
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invalid-LDR_PRE-arm.txt
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invalid-LDR-thumb.txt
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ARM: enable decoding of pc-relative PLD/PLI
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2013-06-24 09:11:38 +00:00 |
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invalid-LDRB_POST-arm.txt
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invalid-LDRD_PRE-thumb.txt
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ARM: rGPR is meant to be unpredictable, not undefined
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2013-06-24 09:14:54 +00:00 |
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invalid-LDRrs-arm.txt
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invalid-MCR-arm.txt
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invalid-MOVr-arm.txt
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invalid-MOVs-arm.txt
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invalid-MOVs-LSL-arm.txt
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invalid-MOVTi16-arm.txt
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invalid-MRRC2-arm.txt
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invalid-MSRi-arm.txt
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invalid-NEON-thumb.txt
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ARM: check predicate bits for thumb instructions
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2013-06-24 09:15:01 +00:00 |
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invalid-RFEorLDMIA-arm.txt
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invalid-SBFX-arm.txt
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invalid-SMLAD-arm.txt
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invalid-SRS-arm.txt
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ARM: enforce SRS decoding constraints
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2013-06-08 13:43:59 +00:00 |
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invalid-STMIA_UPD-thumb.txt
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invalid-STR-thumb.txt
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ARM: thumb stores cannot use PC as dest register
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2013-06-18 08:02:56 +00:00 |
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invalid-SXTB-arm.txt
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invalid-t2Bcc-thumb.txt
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invalid-t2LDRBT-thumb.txt
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invalid-t2LDREXD-thumb.txt
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invalid-t2LDRSHi8-thumb.txt
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invalid-t2LDRSHi12-thumb.txt
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invalid-t2PUSH-thumb.txt
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invalid-t2STR_POST-thumb.txt
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invalid-t2STRD_PRE-thumb.txt
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ARM: rGPR is meant to be unpredictable, not undefined
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2013-06-24 09:14:54 +00:00 |
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invalid-t2STREXB-thumb.txt
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invalid-t2STREXD-thumb.txt
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invalid-UMAAL-arm.txt
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invalid-v8fp.txt
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Add a V8FP instruction 'vcvt{b,t}' to convert between half and double precision.
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2013-07-04 10:04:08 +00:00 |
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invalid-VCVT-arm.txt
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ARM: fix VCVT decoding
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2013-06-08 13:29:11 +00:00 |
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invalid-VEXTd-arm.txt
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ARM: fix VEXT encoding corner case
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2013-05-31 13:47:25 +00:00 |
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invalid-VFP-thumb.txt
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ARM: check predicate bits for thumb instructions
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2013-06-24 09:15:01 +00:00 |
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invalid-VLD1DUPq8_UPD-arm.txt
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invalid-VLD1LNd32_UPD-thumb.txt
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invalid-VLD3DUPd32_UPD-thumb.txt
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invalid-VLD4DUPd32_UPD-thumb.txt
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invalid-VLD4LNd32_UPD-thumb.txt
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invalid-VLDMSDB_UPD-arm.txt
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invalid-VLDST-arm.txt
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ARM: Enforce decoding rules for VLDn instructions
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2013-06-11 08:14:14 +00:00 |
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invalid-VMOV-arm.txt
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ARM: fix VMOVvnf32 decoding when ambiguous with VCVT
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2013-06-08 13:54:05 +00:00 |
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invalid-VQADD-arm.txt
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Q registers are encoded in fields of the same length as D registers. As Q registers are half as many, the ARM reference manual mandates the least significant bit to be zeroed out. Failure to do so should result in an undefined instruction. With this change test/MC/Disassembler/ARM/invalid-VQADD-arm.txt is passing (removed XFAIL).
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2013-05-20 14:42:43 +00:00 |
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invalid-VST1d8Twb_register-thumb.txt
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Make ARMAsmParser accept the correct alignment specifier syntax in instructions.
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2013-02-14 14:46:12 +00:00 |
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invalid-VST1LNd32_UPD-thumb.txt
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invalid-VST2b32_UPD-arm.txt
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VSTn instructions have a number of encoding constraints which are not implemented. I have added these using wrapper methods around the original custom decoder (incidentally - this is a huge poorly written method that should be cleaned up. I have left it as is since the changes would be much to hard to review).
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2013-05-20 14:57:05 +00:00 |
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invalid-VST4LNd32_UPD-thumb.txt
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ldrd-armv4.txt
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lit.local.cfg
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marked-up-thumb.txt
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memory-arm-instructions.txt
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neon-tests.txt
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Make ARMAsmPrinter generate the correct alignment specifier syntax in instructions.
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2013-02-22 10:01:33 +00:00 |
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neon-v8.txt
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Add the tests that I forgot to 'svn add' with my previous commit (r186504).
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2013-07-17 14:03:49 +00:00 |
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neon.txt
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Make ARMAsmPrinter generate the correct alignment specifier syntax in instructions.
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2013-02-22 10:01:33 +00:00 |
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neont2.txt
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ARM: Enforce decoding rules for VLDn instructions
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2013-06-11 08:14:14 +00:00 |
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neont-VLD-reencoding.txt
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Make ARMAsmPrinter generate the correct alignment specifier syntax in instructions.
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2013-02-22 10:01:33 +00:00 |
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neont-VST-reencoding.txt
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Make ARMAsmPrinter generate the correct alignment specifier syntax in instructions.
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2013-02-22 10:01:33 +00:00 |
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thumb1.txt
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This corrects the implementation of Thumb ADR instruction. There are three issues:
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2013-07-03 09:21:44 +00:00 |
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thumb2.txt
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ARM: operands should be explicit when disassembled
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2013-06-26 13:39:07 +00:00 |
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thumb-MSR-MClass.txt
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thumb-neon-v8.txt
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Add the tests that I forgot to 'svn add' with my previous commit (r186504).
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2013-07-17 14:03:49 +00:00 |
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thumb-printf.txt
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thumb-tests.txt
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ARM: fix thumb coprocessor instruction with pre-writeback disassembly
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2013-06-14 11:21:35 +00:00 |
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unpredictable-ADC-arm.txt
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unpredictable-ADDREXT3-arm.txt
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unpredictable-AExtI-arm.txt
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unpredictable-AI1cmp-arm.txt
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unpredictable-BFI.txt
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unpredictable-LDR-arm.txt
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unpredictable-LDRD-arm.txt
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unpredictable-LSL-regform.txt
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unpredictable-MRRC2-arm.txt
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unpredictable-MRS-arm.txt
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unpredictable-MUL-arm.txt
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unpredictable-RSC-arm.txt
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unpredictable-SEL-arm.txt
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unpredictable-SHADD16-arm.txt
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unpredictable-SSAT-arm.txt
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unpredictable-STRBrs-arm.txt
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unpredictable-swp-arm.txt
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unpredictable-UQADD8-arm.txt
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unpredictables-thumb.txt
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v8fp.txt
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Add MC assembly/disassembly support for VRINT{A, N, P, M} to V8FP.
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2013-07-09 11:26:18 +00:00 |
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vfp4.txt
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