llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-12 03:32:10 +00:00

History

Chris Lattner c8af02c403 Improve signed division by power of 2 *dramatically* from this:

div:
        mov %EDX, DWORD PTR [%ESP + 4]
        mov %ECX, 64
        mov %EAX, %EDX
        sar %EDX, 31
        idiv %ECX
        ret

to this:

div:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, %EAX
        sar %ECX, 5
        shr %ECX, 26
        mov %EDX, %EAX
        add %EDX, %ECX
        sar %EAX, 6
        ret

Note that the intel compiler is currently making this:

div:
        movl      4(%esp), %edx                                 #3.5
        movl      %edx, %eax                                    #4.14
        sarl      $5, %eax                                      #4.14
        shrl      $26, %eax                                     #4.14
        addl      %edx, %eax                                    #4.14
        sarl      $6, %eax                                      #4.14
        ret                                                     #4.14

Which has one less register->register copy.  (hint hint alkis :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13354 91177308-0d34-0410-b5e6-96231b3b80d8

2004-05-04 19:33:58 +00:00

CBackend

Changes to fix up the inst_iterator to pass to boost iterator checks. This

2004-04-27 15:13:33 +00:00

PowerPC

fine grainify namespacification

2004-02-28 19:53:18 +00:00

Sparc

I don't think we have to have 4 extra allocated (but unused) bytes on the stack.

2004-04-13 18:28:37 +00:00

SparcV8

I don't think we have to have 4 extra allocated (but unused) bytes on the stack.