Colin LeMahieu c93be748d7 [Hexagon] Adding new-value store and bit reverse instructions. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226224 91177308-0d34-0410-b5e6-96231b3b80d8

2015-01-15 23:10:29 +00:00

..

AArch64

Condition codes AL and NV are invalid in the aliases that use

2014-06-10 13:11:35 +00:00

ARM

Add support for ARM modified-immediate assembly syntax.

2014-12-02 10:53:20 +00:00

Hexagon

[Hexagon] Adding new-value store and bit reverse instructions.

2015-01-15 23:10:29 +00:00

Mips

Add disassembler tests for mips64r6 platform. There are no functional changes.

2015-01-15 14:18:12 +00:00

PowerPC

[PowerPC] Add assembler support for mcrfs and friends

2015-01-15 01:00:53 +00:00

Sparc

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

SystemZ

[SystemZ] Add MC support for LEDBRA, LEXBRA and LDXBRA

2014-07-10 11:00:55 +00:00

X86

[X86] Don't print 'dword ptr' or 'qword ptr' on the operand to some of the LEA variants in Intel syntax. The memory operand is inherently unsized.

2015-01-08 07:41:30 +00:00

XCore

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00