Dan Gohman c9403659a9 Split the SDValue out of OutputArg so that SelectionDAG-independent ...

code can do calling-convention queries. This obviates OutputArgReg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107786 91177308-0d34-0410-b5e6-96231b3b80d8

2010-07-07 15:54:55 +00:00

..

Mangler.h

Revert r107205 and r107207.

2010-06-29 22:34:52 +00:00

SubtargetFeature.h

The getDefaultSubtargetFeatures method of SubtargetFeature did actually return a

2010-05-11 00:30:02 +00:00

Target.td

Add a new target independent COPY instruction and code to lower it.

2010-07-02 22:29:50 +00:00

TargetAsmBackend.h

MC: Change RelaxInstruction to only take the input and output instructions.

2010-05-26 18:15:06 +00:00

TargetAsmLexer.h

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TargetAsmParser.h

Fix various doxygen warnings.

2010-02-22 04:10:52 +00:00

TargetCallingConv.h

Split the SDValue out of OutputArg so that SelectionDAG-independent

2010-07-07 15:54:55 +00:00

TargetCallingConv.td

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TargetData.h

Revert r97064. Duncan pointed out that bitcasts are defined in

2010-02-25 15:20:39 +00:00

TargetELFWriterInfo.h

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TargetFrameInfo.h

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TargetInstrDesc.h

Start TargetRegisterClass indices at 0 instead of 1, so that

2010-06-18 18:13:55 +00:00

TargetInstrInfo.h

Change if-conversion block size limit checks to add some flexibility.

2010-06-25 22:42:03 +00:00

TargetInstrItineraries.h

declare a class with 'class' instead of struct to avoid tag mismatch

2010-06-12 15:46:56 +00:00

TargetIntrinsicInfo.h

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TargetJITInfo.h

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TargetLowering.h

Split the SDValue out of OutputArg so that SelectionDAG-independent

2010-07-07 15:54:55 +00:00

TargetLoweringObjectFile.h

Add a new section and accessor for TLS data.

2010-05-22 00:00:58 +00:00

TargetMachine.h

MC: Add TargetMachine support for setting the value of MCRelaxAll with

2010-05-26 21:48:55 +00:00

TargetOpcodes.h

Add a new target independent COPY instruction and code to lower it.

2010-07-02 22:29:50 +00:00

TargetOptions.h

Remove the -enable-sjlj-eh option, which doesn't do anything.

2010-05-02 15:36:26 +00:00

TargetRegisterInfo.h

Make getMinimalPhysRegClass' comment mention what makes it different

2010-07-06 15:31:55 +00:00

TargetRegistry.h

Currently, createMachOStreamer() is invoked directly in llvm-mc which

2010-05-21 12:54:43 +00:00

TargetSchedule.td

Make processor FUs unique for given itinerary. This extends the limit of 32

2010-04-18 20:31:01 +00:00

TargetSelect.h

Add the rest of the build system logic for optional target disassemblers

2009-11-25 04:46:58 +00:00

TargetSelectionDAG.td

finally remove the immAllOnesV_bc/immAllZerosV_bc patterns

2010-03-28 08:43:23 +00:00

TargetSelectionDAGInfo.h

Fix a comment.

2010-05-11 18:03:41 +00:00

TargetSubtarget.h

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