mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-10-31 08:16:47 +00:00
39f4e8d9cc
This update was done with the following bash script:
find test/Transforms -name "*.ll" | \
while read NAME; do
echo "$NAME"
if ! grep -q "^; *RUN: *llc" $NAME; then
TEMP=`mktemp -t temp`
cp $NAME $TEMP
sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
while read FUNC; do
sed -i '' "s/;\(.*\)\([A-Za-z0-9_]*\):\( *\)@$FUNC\([( ]*\)\$/;\1\2-LABEL:\3@$FUNC(/g" $TEMP
done
mv $TEMP $NAME
fi
done
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186268 91177308-0d34-0410-b5e6-96231b3b80d8
317 lines
7.0 KiB
LLVM
317 lines
7.0 KiB
LLVM
; RUN: opt -simplifycfg -S -o - < %s | FileCheck %s
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declare void @helper(i32)
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define void @test1(i1 %a, i1 %b) {
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; CHECK-LABEL: @test1(
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entry:
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br i1 %a, label %Y, label %X, !prof !0
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; CHECK: br i1 %or.cond, label %Z, label %Y, !prof !0
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X:
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%c = or i1 %b, false
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br i1 %c, label %Z, label %Y, !prof !1
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Y:
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call void @helper(i32 0)
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ret void
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Z:
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call void @helper(i32 1)
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ret void
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}
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define void @test2(i1 %a, i1 %b) {
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; CHECK-LABEL: @test2(
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entry:
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br i1 %a, label %X, label %Y, !prof !1
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; CHECK: br i1 %or.cond, label %Z, label %Y, !prof !1
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; CHECK-NOT: !prof
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X:
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%c = or i1 %b, false
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br i1 %c, label %Z, label %Y, !prof !2
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Y:
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call void @helper(i32 0)
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ret void
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Z:
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call void @helper(i32 1)
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ret void
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}
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define void @test3(i1 %a, i1 %b) {
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; CHECK-LABEL: @test3(
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; CHECK-NOT: !prof
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entry:
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br i1 %a, label %X, label %Y, !prof !1
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X:
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%c = or i1 %b, false
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br i1 %c, label %Z, label %Y
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Y:
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call void @helper(i32 0)
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ret void
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Z:
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call void @helper(i32 1)
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ret void
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}
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define void @test4(i1 %a, i1 %b) {
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; CHECK-LABEL: @test4(
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; CHECK-NOT: !prof
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entry:
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br i1 %a, label %X, label %Y
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X:
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%c = or i1 %b, false
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br i1 %c, label %Z, label %Y, !prof !1
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Y:
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call void @helper(i32 0)
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ret void
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Z:
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call void @helper(i32 1)
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ret void
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}
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;; test5 - The case where it jumps to the default target will be removed.
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define void @test5(i32 %M, i32 %N) nounwind uwtable {
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entry:
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switch i32 %N, label %sw2 [
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i32 1, label %sw2
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i32 2, label %sw.bb
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i32 3, label %sw.bb1
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], !prof !3
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; CHECK: test5
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; CHECK: switch i32 %N, label %sw2 [
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; CHECK: i32 3, label %sw.bb1
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; CHECK: i32 2, label %sw.bb
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; CHECK: ], !prof !2
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sw.bb:
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call void @helper(i32 0)
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br label %sw.epilog
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sw.bb1:
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call void @helper(i32 1)
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br label %sw.epilog
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sw2:
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call void @helper(i32 2)
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br label %sw.epilog
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sw.epilog:
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ret void
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}
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;; test6 - Some cases of the second switch are pruned during optimization.
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;; Then the second switch will be converted to a branch, finally, the first
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;; switch and the branch will be merged into a single switch.
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define void @test6(i32 %M, i32 %N) nounwind uwtable {
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entry:
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switch i32 %N, label %sw2 [
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i32 1, label %sw2
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i32 2, label %sw.bb
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i32 3, label %sw.bb1
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], !prof !4
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; CHECK: test6
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; CHECK: switch i32 %N, label %sw.epilog
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; CHECK: i32 3, label %sw.bb1
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; CHECK: i32 2, label %sw.bb
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; CHECK: i32 4, label %sw.bb5
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; CHECK: ], !prof !3
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sw.bb:
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call void @helper(i32 0)
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br label %sw.epilog
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sw.bb1:
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call void @helper(i32 1)
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br label %sw.epilog
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sw2:
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;; Here "case 2" is invalidated since the default case of the first switch
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;; does not include "case 2".
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switch i32 %N, label %sw.epilog [
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i32 2, label %sw.bb4
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i32 4, label %sw.bb5
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], !prof !5
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sw.bb4:
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call void @helper(i32 2)
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br label %sw.epilog
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sw.bb5:
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call void @helper(i32 3)
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br label %sw.epilog
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sw.epilog:
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ret void
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}
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;; This test is based on test1 but swapped the targets of the second branch.
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define void @test1_swap(i1 %a, i1 %b) {
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; CHECK-LABEL: @test1_swap(
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entry:
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br i1 %a, label %Y, label %X, !prof !0
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; CHECK: br i1 %or.cond, label %Y, label %Z, !prof !4
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X:
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%c = or i1 %b, false
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br i1 %c, label %Y, label %Z, !prof !1
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Y:
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call void @helper(i32 0)
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ret void
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Z:
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call void @helper(i32 1)
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ret void
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}
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define void @test7(i1 %a, i1 %b) {
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; CHECK-LABEL: @test7(
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entry:
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%c = or i1 %b, false
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br i1 %a, label %Y, label %X, !prof !0
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; CHECK: br i1 %brmerge, label %Y, label %Z, !prof !5
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X:
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br i1 %c, label %Y, label %Z, !prof !6
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Y:
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call void @helper(i32 0)
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ret void
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Z:
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call void @helper(i32 1)
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ret void
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}
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; Test basic folding to a conditional branch.
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define void @test8(i64 %x, i64 %y) nounwind {
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; CHECK-LABEL: @test8(
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entry:
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%lt = icmp slt i64 %x, %y
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; CHECK: br i1 %lt, label %a, label %b, !prof !6
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%qux = select i1 %lt, i32 0, i32 2
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switch i32 %qux, label %bees [
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i32 0, label %a
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i32 1, label %b
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i32 2, label %b
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], !prof !7
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a:
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call void @helper(i32 0) nounwind
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ret void
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b:
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call void @helper(i32 1) nounwind
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ret void
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bees:
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call void @helper(i32 2) nounwind
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ret void
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}
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; Test edge splitting when the default target has icmp and unconditinal
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; branch
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define i1 @test9(i32 %x, i32 %y) nounwind {
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; CHECK-LABEL: @test9(
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entry:
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switch i32 %x, label %bees [
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i32 0, label %a
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i32 1, label %end
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i32 2, label %end
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], !prof !7
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; CHECK: switch i32 %x, label %bees [
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; CHECK: i32 0, label %a
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; CHECK: i32 1, label %end
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; CHECK: i32 2, label %end
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; CHECK: i32 92, label %end
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; CHECK: ], !prof !7
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a:
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call void @helper(i32 0) nounwind
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%reta = icmp slt i32 %x, %y
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ret i1 %reta
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bees:
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%tmp = icmp eq i32 %x, 92
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br label %end
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end:
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; CHECK: end:
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; CHECK: %ret = phi i1 [ true, %entry ], [ false, %bees ], [ true, %entry ], [ true, %entry ]
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%ret = phi i1 [ true, %entry ], [%tmp, %bees], [true, %entry]
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call void @helper(i32 2) nounwind
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ret i1 %ret
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}
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define void @test10(i32 %x) nounwind readnone ssp noredzone {
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entry:
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switch i32 %x, label %lor.rhs [
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i32 2, label %lor.end
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i32 1, label %lor.end
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i32 3, label %lor.end
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], !prof !7
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lor.rhs:
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call void @helper(i32 1) nounwind
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ret void
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lor.end:
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call void @helper(i32 0) nounwind
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ret void
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; CHECK: test10
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; CHECK: %x.off = add i32 %x, -1
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; CHECK: %switch = icmp ult i32 %x.off, 3
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; CHECK: br i1 %switch, label %lor.end, label %lor.rhs, !prof !8
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}
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; Remove dead cases from the switch.
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define void @test11(i32 %x) nounwind {
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%i = shl i32 %x, 1
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switch i32 %i, label %a [
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i32 21, label %b
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i32 24, label %c
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], !prof !8
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; CHECK: %cond = icmp eq i32 %i, 24
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; CHECK: br i1 %cond, label %c, label %a, !prof !9
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a:
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call void @helper(i32 0) nounwind
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ret void
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b:
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call void @helper(i32 1) nounwind
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ret void
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c:
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call void @helper(i32 2) nounwind
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ret void
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}
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!0 = metadata !{metadata !"branch_weights", i32 3, i32 5}
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!1 = metadata !{metadata !"branch_weights", i32 1, i32 1}
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!2 = metadata !{metadata !"branch_weights", i32 1, i32 2}
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!3 = metadata !{metadata !"branch_weights", i32 4, i32 3, i32 2, i32 1}
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!4 = metadata !{metadata !"branch_weights", i32 4, i32 3, i32 2, i32 1}
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!5 = metadata !{metadata !"branch_weights", i32 7, i32 6, i32 5}
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!6 = metadata !{metadata !"branch_weights", i32 1, i32 3}
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!7 = metadata !{metadata !"branch_weights", i32 33, i32 9, i32 8, i32 7}
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!8 = metadata !{metadata !"branch_weights", i32 33, i32 9, i32 8}
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; CHECK: !0 = metadata !{metadata !"branch_weights", i32 5, i32 11}
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; CHECK: !1 = metadata !{metadata !"branch_weights", i32 1, i32 5}
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; CHECK: !2 = metadata !{metadata !"branch_weights", i32 7, i32 1, i32 2}
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; CHECK: !3 = metadata !{metadata !"branch_weights", i32 49, i32 12, i32 24, i32 35}
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; CHECK: !4 = metadata !{metadata !"branch_weights", i32 11, i32 5}
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; CHECK: !5 = metadata !{metadata !"branch_weights", i32 17, i32 15}
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; CHECK: !6 = metadata !{metadata !"branch_weights", i32 9, i32 7}
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; CHECK: !7 = metadata !{metadata !"branch_weights", i32 17, i32 9, i32 8, i32 7, i32 17}
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; CHECK: !8 = metadata !{metadata !"branch_weights", i32 24, i32 33}
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; CHECK: !9 = metadata !{metadata !"branch_weights", i32 8, i32 33}
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; CHECK-NOT: !9
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