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c97fb73e2f3951bdb628f656a672458adb159a6e
llvm-6502/test/MC/Mips/mips32
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Vasileios Kalintiris eaf8f5efe9 [mips] Add support for COP1's Branch-On-Cond-Likely instructions
Summary: Depends on D5782

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5802

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220042 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-17 14:08:28 +00:00
..
abiflags.s
Re-commit: [mips] Correct section alignments and EntrySizes for .bss, .text, .data, .reginfo, .MIPS.options, and .MIPS.abiflags
2014-07-14 15:05:51 +00:00
invalid-mips32r2-xfail.s
[mips] Marked up instructions added in MIPS32r2 and tested that IAS for -mcpu=mips(2|32) does not accept them
2014-05-13 11:45:36 +00:00
invalid-mips32r2.s
[mips] Marked the DI/EI instruction aliases as MIPS32r2
2014-10-16 15:23:52 +00:00
invalid-mips64.s
[mips] Fold FeatureBitCount into FeatureMips32 and FeatureMips64
2014-05-12 12:41:59 +00:00
valid-xfail.s
Revert: r215698 - Current implementation of c.cond.fmt instructions only accept default cc0 register...
2014-08-17 19:47:47 +00:00
valid.s
[mips] Add support for COP1's Branch-On-Cond-Likely instructions
2014-10-17 14:08:28 +00:00
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