Evan Cheng caab129cd1 Do not use register as base ptr of pre- and post- inc/dec load / store nodes. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71098 91177308-0d34-0410-b5e6-96231b3b80d8

2009-05-06 18:25:01 +00:00

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Alpha

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ARM

Do not use register as base ptr of pre- and post- inc/dec load / store nodes.

2009-05-06 18:25:01 +00:00

CBackend

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CellSPU

Revert 67132. This is breaking some objective-c apps.

2009-03-25 20:20:11 +00:00

CPP

Fix code emission for conditional branches.

2009-05-04 19:10:38 +00:00

Generic

Disable the load-shrinking optimization from looking at

2009-04-29 03:45:07 +00:00

IA64

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Mips

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PowerPC

Second attempt:

2009-04-29 00:15:41 +00:00

SPARC

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X86

Renamed Spiller classes (plus uses and related files) to VirtRegRewriter.

2009-05-06 02:36:21 +00:00

XCore

testcase for PR3898

2009-04-18 20:49:22 +00:00