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https://github.com/c64scene-ar/llvm-6502.git
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b64e2115de
physical register as candidate for common subexpression elimination in MachineCSE. This fixes a bug on PowerPC in MultiSource/Applications/oggenc/oggenc caused by MachineCSE invalidly merging two separate DYNALLOC insns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167855 91177308-0d34-0410-b5e6-96231b3b80d8
19 lines
554 B
LLVM
19 lines
554 B
LLVM
; RUN: llc < %s | FileCheck %s
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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define void @test(i64 %n) nounwind {
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entry:
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%0 = alloca i8, i64 %n, align 1
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%1 = alloca i8, i64 %n, align 1
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call void @use(i8* %0, i8* %1) nounwind
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ret void
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}
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declare void @use(i8*, i8*)
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; Check we actually have two instances of dynamic stack allocation,
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; identified by the stdux used to update the back-chain link.
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; CHECK: stdux
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; CHECK: stdux
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