Michael Kuperstein 2b5910a767 Reverting r229831 due to multiple ARM/PPC/MIPS build-bot failures. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229841 91177308-0d34-0410-b5e6-96231b3b80d8

2015-02-19 11:38:11 +00:00

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AsmParser

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InstPrinter

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MCTargetDesc

Reverting r229831 due to multiple ARM/PPC/MIPS build-bot failures.

2015-02-19 11:38:11 +00:00

TargetInfo

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AMDGPU.h

[PM] Remove a bunch of stale TTI creation method declarations. I nuked

2015-02-01 00:22:15 +00:00

AMDGPU.td

R600/SI: Set noNamedPositionallyEncodedOperands

2015-02-18 02:15:32 +00:00

AMDGPUAlwaysInlinePass.cpp

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AMDGPUAsmPrinter.cpp

Grab the subtarget off of the machine function for the R600

2015-02-19 01:10:53 +00:00

AMDGPUAsmPrinter.h

Remove the DisasmEnabled AsmPrinter variable and just look it

2015-02-19 01:10:49 +00:00

AMDGPUCallingConv.td

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AMDGPUFrameLowering.cpp

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AMDGPUFrameLowering.h

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AMDGPUInstrInfo.cpp

Make helper functions/classes/globals static. NFC.

2015-02-06 17:51:54 +00:00

AMDGPUInstrInfo.h

R600/SI: Determine target-specific encoding of READLANE and WRITELANE early v2

2015-02-03 17:37:57 +00:00

AMDGPUInstrInfo.td

R600/SI: Fix implicit vcc operand to v_div_fmas_*

2015-02-14 04:22:00 +00:00

AMDGPUInstructions.td

R600/SI: Don't set isCodeGenOnly = 1 on all instructions

2015-02-18 16:08:17 +00:00

AMDGPUIntrinsicInfo.cpp

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AMDGPUIntrinsicInfo.h

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AMDGPUIntrinsics.td

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AMDGPUISelDAGToDAG.cpp

R600/SI: Use complex operand folding for div_scale

2015-02-14 04:24:28 +00:00

AMDGPUISelLowering.cpp

R600/SI: Fix implicit vcc operand to v_div_fmas_*

2015-02-14 04:22:00 +00:00

AMDGPUISelLowering.h

Reuse a bunch of cached subtargets and remove getSubtarget calls

2015-01-30 23:24:40 +00:00

AMDGPUMachineFunction.cpp

R600: Canonicalize access to function attributes, NFC

2015-02-14 02:45:45 +00:00

AMDGPUMachineFunction.h

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AMDGPUMCInstLower.cpp

Grab the subtarget off of the machine function for the R600

2015-02-19 01:10:53 +00:00

AMDGPUMCInstLower.h

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AMDGPUPromoteAlloca.cpp

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AMDGPURegisterInfo.cpp

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AMDGPURegisterInfo.h

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AMDGPURegisterInfo.td

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AMDGPUSubtarget.cpp

80-column fixups.

2015-02-19 00:15:33 +00:00

AMDGPUSubtarget.h

R600/SI: Disable subreg liveness

2015-02-11 18:24:53 +00:00

AMDGPUTargetMachine.cpp

[PM] Remove the old 'PassManager.h' header file at the top level of

2015-02-13 10:01:29 +00:00

AMDGPUTargetMachine.h

R600: Split AMDGPUPassConfig into R600PassConfig and GCNPassConfig

2015-02-11 17:11:51 +00:00

AMDGPUTargetTransformInfo.cpp

R600/SI: Fix bug in TTI loop unrolling preferences

2015-02-05 15:32:18 +00:00

AMDGPUTargetTransformInfo.h

[multiversion] Remove the function parameter from the unrolling

2015-02-01 14:31:23 +00:00

AMDILCFGStructurizer.cpp

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AMDKernelCodeT.h

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CaymanInstructions.td

R600/SI: Implement correct f64 fdiv

2015-02-14 04:30:08 +00:00

CIInstructions.td

Reuse a bunch of cached subtargets and remove getSubtarget calls

2015-01-30 23:24:40 +00:00

CMakeLists.txt

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EvergreenInstructions.td

R600/SI: Implement correct f64 fdiv

2015-02-14 04:30:08 +00:00

LLVMBuild.txt

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Makefile

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Processors.td

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R600ClauseMergePass.cpp

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R600ControlFlowFinalizer.cpp

Reuse a bunch of cached subtargets and remove getSubtarget calls

2015-01-30 23:24:40 +00:00

R600Defines.h

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R600EmitClauseMarkers.cpp

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R600ExpandSpecialInstrs.cpp

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R600InstrFormats.td

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R600InstrInfo.cpp

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R600InstrInfo.h

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R600Instructions.td

R600/SI: Don't set isCodeGenOnly = 1 on all instructions

2015-02-18 16:08:17 +00:00

R600Intrinsics.td

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R600ISelLowering.cpp

Prefer SmallVector::append/insert over push_back loops.

2015-02-17 15:29:18 +00:00

R600ISelLowering.h

Reuse a bunch of cached subtargets and remove getSubtarget calls

2015-01-30 23:24:40 +00:00

R600MachineFunctionInfo.cpp

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R600MachineFunctionInfo.h

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R600MachineScheduler.cpp

Remove a few more calls to TargetMachine::getSubtarget from the

2015-02-19 01:10:55 +00:00

R600MachineScheduler.h

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R600OptimizeVectorRegisters.cpp

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R600Packetizer.cpp

Reuse a bunch of cached subtargets and remove getSubtarget calls

2015-01-30 23:24:40 +00:00

R600RegisterInfo.cpp

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R600RegisterInfo.h

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R600RegisterInfo.td

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R600Schedule.td

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R600TextureIntrinsicsReplacer.cpp

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R700Instructions.td

Reuse a bunch of cached subtargets and remove getSubtarget calls

2015-01-30 23:24:40 +00:00

SIAnnotateControlFlow.cpp

R600/SI: Fix bug from insertion of llvm.SI.end.cf into loop headers

2015-02-05 15:32:15 +00:00

SIDefines.h

R600/SI: Also enable WQM for image opcodes which calculate LOD v3

2015-02-06 02:51:20 +00:00

SIFixSGPRCopies.cpp

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SIFixSGPRLiveRanges.cpp

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SIFoldOperands.cpp

R600/SI: Fix asam errors in SIFoldOperands

2015-02-17 20:11:54 +00:00

SIInsertWaits.cpp

R600/SI: Fix dependency between instruction writing M0 and S_SENDMSG on VI (v2)

2015-02-03 17:37:52 +00:00

SIInstrFormats.td

R600/SI: Fix READLANE and WRITELANE lane select for VI

2015-02-18 22:12:45 +00:00

SIInstrInfo.cpp

R600/SI: Simplify verification of AMDGPU::OPERAND_REG_INLINE_C

2015-02-18 22:12:41 +00:00

SIInstrInfo.h

R600/SI: Allow f64 inline immediates in i64 operands

2015-02-13 19:05:03 +00:00

SIInstrInfo.td

R600/SI: Don't set isCodeGenOnly = 1 on all instructions

2015-02-18 16:08:17 +00:00

SIInstructions.td

R600/SI: Fix READLANE and WRITELANE lane select for VI

2015-02-18 22:12:45 +00:00

SIIntrinsics.td

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SIISelLowering.cpp

Prefer SmallVector::append/insert over push_back loops.

2015-02-17 15:29:18 +00:00

SIISelLowering.h

Reuse a bunch of cached subtargets and remove getSubtarget calls

2015-01-30 23:24:40 +00:00

SILoadStoreOptimizer.cpp

Reuse a bunch of cached subtargets and remove getSubtarget calls

2015-01-30 23:24:40 +00:00

SILowerControlFlow.cpp

R600/SI: Don't enable WQM for V_INTERP_* instructions v2

2015-02-06 02:51:25 +00:00

SILowerI1Copies.cpp

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SIMachineFunctionInfo.cpp

Remove a few more calls to TargetMachine::getSubtarget from the

2015-02-19 01:10:55 +00:00

SIMachineFunctionInfo.h

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SIPrepareScratchRegs.cpp

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SIRegisterInfo.cpp

R600/SI: Determine target-specific encoding of READLANE and WRITELANE early v2

2015-02-03 17:37:57 +00:00

SIRegisterInfo.h

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SIRegisterInfo.td

R600/SI: Really fix size of VReg_1

2015-02-14 03:54:32 +00:00

SISchedule.td

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SIShrinkInstructions.cpp

R600/SI: Allow f64 inline immediates in i64 operands

2015-02-13 19:05:03 +00:00

SITypeRewriter.cpp

R600: Canonicalize access to function attributes, NFC

2015-02-14 02:45:45 +00:00

VIInstrFormats.td

R600/SI: Rename dst encoding field to be consistent with docs

2015-02-18 02:15:37 +00:00

VIInstructions.td

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