Vikram S. Adve 5f2180c533 (1) Added special register class containing (for now) %fsr. ... Fixed spilling of %fcc[0-3] which are part of %fsr. (2) Moved some machine-independent reg-class code to class TargetRegInfo from SparcReg{Class,}Info. (3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly() and related functions and flags. Fixed several bugs where only "isDef" was being checked, not "isDefAndUse". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6341 91177308-0d34-0410-b5e6-96231b3b80d8		2003-05-27 00:05:23 +00:00
..
InstrSched	(1) Added special register class containing (for now) %fsr.	2003-05-27 00:05:23 +00:00
InstrSelection	Remove unneccesary &*	2003-04-23 16:36:11 +00:00
Mapping
ModuloScheduling	Just some code beautification changes I had sitting around in my tree.	2003-04-22 23:00:08 +00:00
PostOpts
PreOpts
RegAlloc	(1) Added special register class containing (for now) %fsr.	2003-05-27 00:05:23 +00:00
LiveVariables.cpp	(1) Added special register class containing (for now) %fsr.	2003-05-27 00:05:23 +00:00
MachineCodeEmitter.cpp	Allow const functions	2003-05-09 03:27:41 +00:00
MachineCodeForInstruction.cpp	Move CallArgsDescriptor into this class instead of making it an	2002-10-29 19:38:46 +00:00
MachineFunction.cpp	Remove unneccesary &*	2003-04-23 16:36:11 +00:00
MachineInstr.cpp	(1) Added special register class containing (for now) %fsr.	2003-05-27 00:05:23 +00:00
MachineInstrAnnot.cpp	Prune #includes	2003-01-15 19:48:13 +00:00
Makefile	Initial checkin of codegen infrastructure for LLVM-JIT	2002-10-25 22:54:41 +00:00
PHIElimination.cpp	(1) Added special register class containing (for now) %fsr.	2003-05-27 00:05:23 +00:00
PrologEpilogInserter.cpp	(1) Added special register class containing (for now) %fsr.	2003-05-27 00:05:23 +00:00
RegAllocLocal.cpp	(1) Added special register class containing (for now) %fsr.	2003-05-27 00:05:23 +00:00
RegAllocSimple.cpp	(1) Added special register class containing (for now) %fsr.	2003-05-27 00:05:23 +00:00