Matthias Braun 67a2b82b14 ARM: Handle physreg targets in RegPair hints gracefully ...

Register coalescing can change the target of a RegPair hint to a
physreg, we should not crash on this. This also slightly improved the
way ARMBaseRegisterInfo::updateRegAllocHint() works.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233987 91177308-0d34-0410-b5e6-96231b3b80d8

2015-04-03 00:18:38 +00:00

..

AArch64

Fix PR23065. Avoid optimizing bitcast of build_vector with constant input to scalar_to_vector.

2015-04-01 01:52:38 +00:00

ARM

ARM: Handle physreg targets in RegPair hints gracefully

2015-04-03 00:18:38 +00:00

BPF

[bpf] mark mov instructions as ReMaterializable

2015-03-31 02:49:58 +00:00

CPP

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Generic

LLParser: Require non-null scope for MDLocation and MDLocalVariable

2015-03-27 17:56:39 +00:00

Hexagon

Expand MUX instructions early on Hexagon

2015-03-31 13:35:12 +00:00

Inputs

DebugInfo: Fix bad debug info for compile units and types

2015-03-27 20:46:33 +00:00

Mips

[mips] Make sure that we don't adjust the stack pointer by zero amount.

2015-04-02 10:14:54 +00:00

MSP430

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NVPTX

[NVPTX] Associate a minimum PTX version for each SM architecture

2015-03-30 19:30:55 +00:00

PowerPC

[PowerPC] FastISel can't handle i1 return values when using CR bits

2015-04-01 00:40:48 +00:00

R600

[R600/SI] Fix testcase check line.

2015-03-27 20:41:42 +00:00

SPARC

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SystemZ

[SystemZ] Support transactional execution on zEC12

2015-04-01 12:51:43 +00:00

Thumb

DebugInfo: Fix bad debug info for compile units and types

2015-03-27 20:46:33 +00:00

Thumb2

Fix a nasty bug in DAGCombine of STORE nodes.

2015-03-19 22:48:57 +00:00

WinEH

[WinEH] Make llvm.eh.actions use frameescape indices for catch params

2015-04-02 21:13:31 +00:00

X86

[AVX] Improve insertion of i8 or i16 into low element of 256-bit zero vector

2015-04-02 20:21:52 +00:00

XCore

DebugInfo: Fix testcases that fail -verify-debug-info=true

2015-03-16 21:10:12 +00:00