Juergen Ributzka ccf53013cd [FastISel][AArch64] Fix simplify address when the address comes from a shift.
When the address comes directly from a shift instruction then the address
computation cannot be folded into the memory instruction, because the zero
register is not available as a base register. Simplify addess needs to emit the
shift instruction and use the result as base register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216621 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-27 21:38:33 +00:00
2014-08-14 15:15:09 +00:00
2014-08-23 21:10:58 +00:00
2014-06-25 13:13:36 +00:00
2014-08-14 15:15:09 +00:00
2014-07-16 16:50:34 +00:00
2014-08-14 15:15:09 +00:00

Low Level Virtual Machine (LLVM)
================================

This directory and its subdirectories contain source code for the Low Level
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LLVM backend for 6502
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