mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-02-18 14:31:27 +00:00
b79e30cc9e
Note that this actually changes code generation, and someone who understands this target better should check the changes. - R12Q is now allocatable. I think it was omitted from the allocation order by mistake since it isn't reserved. It as apparently used as a GOT pointer sometimes, and it should probably be reserved if that is the case. - The GR64 registers are allocated in a different order now. The register allocator will automatically put the CSRs last. There were other changes to the order that may have been significant. The test fix is because r0 and r1 swapped places in the allocation order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133067 91177308-0d34-0410-b5e6-96231b3b80d8
75 lines
1.7 KiB
LLVM
75 lines
1.7 KiB
LLVM
; RUN: llc < %s | FileCheck %s
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target datalayout = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16"
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target triple = "s390x-ibm-linux"
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define i16 @foo(i16 zeroext %a) zeroext {
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%res = tail call i16 @llvm.bswap.i16(i16 %a)
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ret i16 %res
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}
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define i32 @foo2(i32 zeroext %a) zeroext {
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; CHECK: foo2:
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; CHECK: lrvr [[R1:%r.]], %r2
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%res = tail call i32 @llvm.bswap.i32(i32 %a)
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ret i32 %res
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}
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define i64 @foo3(i64 %a) zeroext {
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; CHECK: foo3:
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; CHECK: lrvgr %r2, %r2
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%res = tail call i64 @llvm.bswap.i64(i64 %a)
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ret i64 %res
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}
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define i16 @foo4(i16* %b) zeroext {
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%a = load i16* %b
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%res = tail call i16 @llvm.bswap.i16(i16 %a)
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ret i16 %res
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}
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define i32 @foo5(i32* %b) zeroext {
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; CHECK: foo5:
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; CHECK: lrv [[R1:%r.]], 0(%r2)
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%a = load i32* %b
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%res = tail call i32 @llvm.bswap.i32(i32 %a)
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ret i32 %res
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}
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define i64 @foo6(i64* %b) {
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; CHECK: foo6:
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; CHECK: lrvg %r2, 0(%r2)
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%a = load i64* %b
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%res = tail call i64 @llvm.bswap.i64(i64 %a)
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ret i64 %res
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}
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define void @foo7(i16 %a, i16* %b) {
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%res = tail call i16 @llvm.bswap.i16(i16 %a)
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store i16 %res, i16* %b
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ret void
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}
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define void @foo8(i32 %a, i32* %b) {
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; CHECK: foo8:
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; CHECK: strv %r2, 0(%r3)
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%res = tail call i32 @llvm.bswap.i32(i32 %a)
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store i32 %res, i32* %b
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ret void
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}
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define void @foo9(i64 %a, i64* %b) {
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; CHECK: foo9:
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; CHECK: strvg %r2, 0(%r3)
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%res = tail call i64 @llvm.bswap.i64(i64 %a)
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store i64 %res, i64* %b
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ret void
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}
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declare i16 @llvm.bswap.i16(i16) nounwind readnone
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declare i32 @llvm.bswap.i32(i32) nounwind readnone
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declare i64 @llvm.bswap.i64(i64) nounwind readnone
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