llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-25 00:33:15 +00:00

History

Yunzhong Gao cdb9bd7eb9 Enabling 3DNow! prefetch instruction for a few AMD processors: bobcat, jaguar,

bulldozer and piledriver. Support for the instruction itself seems to have
already been added in r178040.

Differential Revision: http://llvm-reviews.chandlerc.com/D1933



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192828 91177308-0d34-0410-b5e6-96231b3b80d8

2013-10-16 19:04:11 +00:00

Analysis

Remove x86_sse42_crc32_64_8 intrinsic. It has no functional difference from x86_sse42_crc32_32_8 and was not mapped to a clang builtin. I'm not even sure why this form of the instruction is even called out explicitly in the docs. Also add AutoUpgrade support to convert it into the other intrinsic with appropriate trunc and zext.

2013-10-15 05:20:47 +00:00

AsmParser

Add a GlobalAlias::isValidLinkage to reduce code duplication.

2013-10-09 16:07:32 +00:00

Bitcode

Update comment list of GLOBALVAR modifiers in BitcodeWriter to include externally_initialized.

2013-10-14 22:36:51 +00:00

CodeGen

After PostRA scheduling, don't set kill flags on undef operands.