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https://github.com/c64scene-ar/llvm-6502.git
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9ef4835bd8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89423 91177308-0d34-0410-b5e6-96231b3b80d8
49 lines
922 B
LLVM
49 lines
922 B
LLVM
; RUN: llc < %s -march=arm | FileCheck %s --check-prefix=ARM
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; RUN: llc < %s -march=arm -mattr=+thumb2 | FileCheck %s --check-prefix=T2
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define arm_apcscc i32 @t1(i32 %c) nounwind readnone {
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entry:
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; ARM: t1:
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; ARM: mov r1, #101
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; ARM: orr r1, r1, #1, 24
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; ARM: movgt r0, #123
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; T2: t1:
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; T2: movw r0, #357
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; T2: movgt r0, #123
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%0 = icmp sgt i32 %c, 1
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%1 = select i1 %0, i32 123, i32 357
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ret i32 %1
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}
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define arm_apcscc i32 @t2(i32 %c) nounwind readnone {
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entry:
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; ARM: t2:
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; ARM: mov r1, #101
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; ARM: orr r1, r1, #1, 24
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; ARM: movle r0, #123
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; T2: t2:
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; T2: movw r0, #357
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; T2: movle r0, #123
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%0 = icmp sgt i32 %c, 1
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%1 = select i1 %0, i32 357, i32 123
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ret i32 %1
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}
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define arm_apcscc i32 @t3(i32 %a) nounwind readnone {
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entry:
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; ARM: t3:
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; ARM: mov r0, #0
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; ARM: moveq r0, #1
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; T2: t3:
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; T2: mov r0, #0
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; T2: moveq r0, #1
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%0 = icmp eq i32 %a, 160
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%1 = zext i1 %0 to i32
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ret i32 %1
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}
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