llvm-6502/lib/CodeGen
Alkis Evlogimenos ce50115006 Improve debugging output. Remove unneeded virtReg->0 mapping when
virtReg lives on the stack. Now a virtual register has an entry in the
virtual->physical map or the virtual->stack slot map but never in
both.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10958 91177308-0d34-0410-b5e6-96231b3b80d8
2004-01-22 19:24:43 +00:00
..
InstrSched Moved iterators around. 2004-01-20 17:51:13 +00:00
ModuloScheduling
SelectionDAG
IntrinsicLowering.cpp Hrm, apparently I missed lowering this intrinsic. :( 2004-01-14 20:41:29 +00:00
LiveIntervalAnalysis.cpp Revert previous change. The code was correct... 2004-01-22 19:17:52 +00:00
LiveIntervalAnalysis.h Fold open interval ends handling into 2004-01-16 20:17:05 +00:00
LiveVariables.cpp Remove unneeded check (with the recent change in live variables a use 2004-01-13 21:16:25 +00:00
MachineCodeEmitter.cpp
MachineCodeForInstruction.cpp Remove use of llvm/CodeGen/InstrSelection.h 2004-01-10 19:16:26 +00:00
MachineFunction.cpp
MachineInstr.cpp
MachineInstrAnnot.cpp
Makefile
Passes.cpp
PHIElimination.cpp
PrologEpilogInserter.cpp
RegAllocLinearScan.cpp Improve debugging output. Remove unneeded virtReg->0 mapping when 2004-01-22 19:24:43 +00:00
RegAllocLocal.cpp Correctly compute live variable information for physical registers 2004-01-13 06:24:30 +00:00
RegAllocSimple.cpp
TwoAddressInstructionPass.cpp Make LiveVariables::HandlePhysRegUse and 2004-01-11 09:18:45 +00:00