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	------------------------------------------------------------------------ r242434 | tstellar | 2015-07-16 12:40:09 -0700 (Thu, 16 Jul 2015) | 7 lines AMDPGU/SI: Negative offsets aren't allowed in MUBUF's vaddr operand Reviewers: arsenm Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11226 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_37@242684 91177308-0d34-0410-b5e6-96231b3b80d8
		
			
				
	
	
		
			117 lines
		
	
	
		
			4.6 KiB
		
	
	
	
		
			LLVM
		
	
	
	
	
	
			
		
		
	
	
			117 lines
		
	
	
		
			4.6 KiB
		
	
	
	
		
			LLVM
		
	
	
	
	
	
; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=SI < %s | FileCheck --check-prefix=GCN --check-prefix=DEFAULT-SCRATCH %s
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; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=tonga < %s | FileCheck --check-prefix=GCN --check-prefix=DEFAULT-SCRATCH %s
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; RUN: llc -verify-machineinstrs -march=amdgcn -mattr=+huge-scratch-buffer -mcpu=SI < %s | FileCheck --check-prefix=GCN --check-prefix=HUGE-SCRATCH %s
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; RUN: llc -verify-machineinstrs -march=amdgcn -mattr=+huge-scratch-buffer -mcpu=tonga < %s | FileCheck --check-prefix=GCN --check-prefix=HUGE-SCRATCH %s
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; When a frame index offset is more than 12-bits, make sure we don't store
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; it in mubuf's offset field.
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; Also, make sure we use the same register for storing the scratch buffer addresss
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; for both stores. This register is allocated by the register scavenger, so we
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; should be able to reuse the same regiser for each scratch buffer access.
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; GCN-LABEL: {{^}}legal_offset_fi:
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; GCN: v_mov_b32_e32 [[OFFSET:v[0-9]+]], 0{{$}}
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; GCN: buffer_store_dword v{{[0-9]+}}, [[OFFSET]], s[{{[0-9]+}}:{{[0-9]+}}], s{{[0-9]+}} offen
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; GCN: v_mov_b32_e32 [[OFFSET]], 0x8000
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; GCN: buffer_store_dword v{{[0-9]+}}, [[OFFSET]], s[{{[0-9]+}}:{{[0-9]+}}], s{{[0-9]+}} offen{{$}}
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define void @legal_offset_fi(i32 addrspace(1)* %out, i32 %cond, i32 %if_offset, i32 %else_offset) {
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entry:
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  %scratch0 = alloca [8192 x i32]
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  %scratch1 = alloca [8192 x i32]
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  %scratchptr0 = getelementptr [8192 x i32], [8192 x i32]* %scratch0, i32 0, i32 0
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  store i32 1, i32* %scratchptr0
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  %scratchptr1 = getelementptr [8192 x i32], [8192 x i32]* %scratch1, i32 0, i32 0
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  store i32 2, i32* %scratchptr1
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  %cmp = icmp eq i32 %cond, 0
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  br i1 %cmp, label %if, label %else
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if:
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  %if_ptr = getelementptr [8192 x i32], [8192 x i32]* %scratch0, i32 0, i32 %if_offset
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  %if_value = load i32, i32* %if_ptr
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  br label %done
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else:
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  %else_ptr = getelementptr [8192 x i32], [8192 x i32]* %scratch1, i32 0, i32 %else_offset
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  %else_value = load i32, i32* %else_ptr
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  br label %done
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done:
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  %value = phi i32 [%if_value, %if], [%else_value, %else]
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  store i32 %value, i32 addrspace(1)* %out
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  ret void
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  ret void
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}
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; GCN-LABEL: {{^}}legal_offset_fi_offset
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; GCN: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+}}:{{[0-9]+}}], s{{[0-9]+}} offen
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; GCN: v_add_i32_e32 [[OFFSET:v[0-9]+]], 0x8000
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; GCN: buffer_store_dword v{{[0-9]+}}, [[OFFSET]], s[{{[0-9]+}}:{{[0-9]+}}], s{{[0-9]+}} offen{{$}}
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define void @legal_offset_fi_offset(i32 addrspace(1)* %out, i32 %cond, i32 addrspace(1)* %offsets, i32 %if_offset, i32 %else_offset) {
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entry:
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  %scratch0 = alloca [8192 x i32]
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  %scratch1 = alloca [8192 x i32]
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  %offset0 = load i32, i32 addrspace(1)* %offsets
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  %scratchptr0 = getelementptr [8192 x i32], [8192 x i32]* %scratch0, i32 0, i32 %offset0
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  store i32 %offset0, i32* %scratchptr0
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  %offsetptr1 = getelementptr i32, i32 addrspace(1)* %offsets, i32 1
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  %offset1 = load i32, i32 addrspace(1)* %offsetptr1
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  %scratchptr1 = getelementptr [8192 x i32], [8192 x i32]* %scratch1, i32 0, i32 %offset1
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  store i32 %offset1, i32* %scratchptr1
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  %cmp = icmp eq i32 %cond, 0
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  br i1 %cmp, label %if, label %else
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if:
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  %if_ptr = getelementptr [8192 x i32], [8192 x i32]* %scratch0, i32 0, i32 %if_offset
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  %if_value = load i32, i32* %if_ptr
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  br label %done
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else:
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  %else_ptr = getelementptr [8192 x i32], [8192 x i32]* %scratch1, i32 0, i32 %else_offset
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  %else_value = load i32, i32* %else_ptr
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  br label %done
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done:
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  %value = phi i32 [%if_value, %if], [%else_value, %else]
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  store i32 %value, i32 addrspace(1)* %out
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  ret void
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}
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; GCN-LABEL: @neg_vaddr_offset
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; We can't prove %offset is positive, so we must do the computation with the
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; immediate in an add instruction instead of folding offset and the immediate into
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; the store instruction.
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; GCN: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}} offen{{$}}
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define void @neg_vaddr_offset(i32 %offset) {
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entry:
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  %array = alloca [8192 x i32]
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  %ptr_offset = add i32 %offset, 4
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  %ptr = getelementptr [8192 x i32], [8192 x i32]* %array, i32 0, i32 %ptr_offset
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  store i32 0, i32* %ptr
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  ret void
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}
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; GCN-LABEL: @pos_vaddr_offse
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; DEFAULT-SCRATCH: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}} offen offset:16
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; HUGE-SCRATCH: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}} offen{{$}}
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define void @pos_vaddr_offset(i32 addrspace(1)* %out, i32 %offset) {
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entry:
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  %array = alloca [8192 x i32]
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  %ptr = getelementptr [8192 x i32], [8192 x i32]* %array, i32 0, i32 4
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  store i32 0, i32* %ptr
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  %load_ptr = getelementptr [8192 x i32], [8192 x i32]* %array, i32 0, i32 %offset
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  %val = load i32, i32* %load_ptr
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  store i32 %val, i32 addrspace(1)* %out
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  ret void
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}
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