llvm-6502/test/CodeGen
Jim Grosbach 16f9924000 Pseudo-ize the t2LDMIA_RET instruction.
It's just a t2LDMIA_UPD instruction with extra codegen properties, so it
doesn't need the encoding information. As a side-benefit, we now correctly
recognize for instruction printing as a 'pop' instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134173 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30 18:25:42 +00:00
..
Alpha
ARM In the ARM global merging pass, allow extraneous alignment specifiers. This pass 2011-06-29 22:24:25 +00:00
Blackfin
CBackend
CellSPU
CPP
Generic Handle debug info for i128 constants. 2011-06-24 20:46:11 +00:00
MBlaze
Mips Change the chain input of nodes that load the address of a function. This change 2011-06-24 19:01:25 +00:00
MSP430
PowerPC Implement ISD::VAARG lowering on PPC32. 2011-06-28 15:30:42 +00:00
PTX PTX: corrected tests that were failing 2011-06-25 19:41:17 +00:00
SPARC
SystemZ
Thumb
Thumb2 Pseudo-ize the t2LDMIA_RET instruction. 2011-06-30 18:25:42 +00:00
X86 Fix a small thinko for constant i64 lock/orq optimization where we 2011-06-30 00:48:30 +00:00
XCore