llvm-6502/lib/Target/R600
Tom Stellard 6a2f9b9137 R600/SI: Add support for i64 bitwise or
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193213 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-23 00:44:19 +00:00
..
InstPrinter R600: improve dump of S_WAITCNT 2013-10-13 17:56:28 +00:00
MCTargetDesc
TargetInfo
AMDGPU.h R600: Simplify handling of private address space 2013-10-22 18:19:10 +00:00
AMDGPU.td
AMDGPUAsmPrinter.cpp R600/SI: Use S_LOAD_DWORD instructions for v8i32 and v16i32 2013-10-23 00:44:12 +00:00
AMDGPUAsmPrinter.h R600: Store disassembly in a special ELF section when feature +DumpCode is enabled. 2013-10-12 05:02:51 +00:00
AMDGPUCallingConv.td R600/SI: Support byval arguments 2013-10-13 17:56:16 +00:00
AMDGPUConvertToISA.cpp
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUInstrInfo.cpp R600: Simplify handling of private address space 2013-10-22 18:19:10 +00:00
AMDGPUInstrInfo.h R600: Simplify handling of private address space 2013-10-22 18:19:10 +00:00
AMDGPUInstrInfo.td
AMDGPUInstructions.td
AMDGPUIntrinsics.td
AMDGPUISelDAGToDAG.cpp
AMDGPUISelLowering.cpp
AMDGPUISelLowering.h
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h
AMDGPUMCInstLower.cpp R600: Store disassembly in a special ELF section when feature +DumpCode is enabled. 2013-10-12 05:02:51 +00:00
AMDGPUMCInstLower.h
AMDGPURegisterInfo.cpp
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp
AMDGPUSubtarget.h
AMDGPUTargetMachine.cpp R600: Simplify handling of private address space 2013-10-22 18:19:10 +00:00
AMDGPUTargetMachine.h
AMDGPUTargetTransformInfo.cpp
AMDILBase.td
AMDILCFGStructurizer.cpp R600: Remove \ at EOL from ascii art comments. 2013-10-18 14:12:50 +00:00
AMDILInstrInfo.td
AMDILIntrinsicInfo.cpp
AMDILIntrinsicInfo.h
AMDILIntrinsics.td
AMDILISelLowering.cpp
AMDILRegisterInfo.td
CMakeLists.txt R600: Simplify handling of private address space 2013-10-22 18:19:10 +00:00
LLVMBuild.txt
Makefile
Processors.td
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600InstrFormats.td
R600InstrInfo.cpp R600: Simplify handling of private address space 2013-10-22 18:19:10 +00:00
R600InstrInfo.h R600: Simplify handling of private address space 2013-10-22 18:19:10 +00:00
R600Instructions.td R600: Clear the VPM bit of export instructions. 2013-10-13 17:55:57 +00:00
R600Intrinsics.td
R600ISelLowering.cpp R600: Use masked read sel for texture instructions 2013-10-13 17:56:10 +00:00
R600ISelLowering.h
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp
R600Packetizer.cpp R600: Simplify handling of private address space 2013-10-22 18:19:10 +00:00
R600RegisterInfo.cpp R600: Simplify handling of private address space 2013-10-22 18:19:10 +00:00
R600RegisterInfo.h
R600RegisterInfo.td R600: Simplify handling of private address space 2013-10-22 18:19:10 +00:00
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
SIAnnotateControlFlow.cpp
SIDefines.h
SIFixSGPRCopies.cpp
SIInsertWaits.cpp
SIInstrFormats.td
SIInstrInfo.cpp R600/SI: Use llvm_unreachable() for an always false assert 2013-10-22 18:42:03 +00:00
SIInstrInfo.h R600: Simplify handling of private address space 2013-10-22 18:19:10 +00:00
SIInstrInfo.td
SIInstructions.td R600/SI: Add support for i64 bitwise or 2013-10-23 00:44:19 +00:00
SIIntrinsics.td
SIISelLowering.cpp R600/SI: Remove some leftover MI dump call 2013-10-15 22:48:51 +00:00
SIISelLowering.h
SILowerControlFlow.cpp
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIRegisterInfo.cpp
SIRegisterInfo.h
SIRegisterInfo.td R600/SI: Use S_LOAD_DWORD instructions for v8i32 and v16i32 2013-10-23 00:44:12 +00:00
SISchedule.td
SITypeRewriter.cpp