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https://github.com/c64scene-ar/llvm-6502.git
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1ff585db47
Summary: * Add 64-bit address space feature. * Rename SIMD feature to SIMD128. * Handle single-thread model with an IR pass (same way ARM does). * Rename generic processor to MVP, to follow design's lead. * Add bleeding-edge processors, with all features included. * Fix a few DEBUG_TYPE to match other backends. Test Plan: ninja check Reviewers: sunfish Subscribers: jfb, llvm-commits Differential Revision: http://reviews.llvm.org/D10880 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241211 91177308-0d34-0410-b5e6-96231b3b80d8
47 lines
2.0 KiB
TableGen
47 lines
2.0 KiB
TableGen
// WebAssemblyInstrInfo.td-Describe the WebAssembly Instructions-*- tablegen -*-
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// WebAssembly Instruction definitions.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// WebAssembly Instruction Predicate Definitions.
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//===----------------------------------------------------------------------===//
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def HasAddr32 : Predicate<"!Subtarget->hasAddr64()">;
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def HasAddr64 : Predicate<"Subtarget->hasAddr64()">;
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def HasSIMD128 : Predicate<"Subtarget->hasSIMD128()">,
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AssemblerPredicate<"FeatureSIMD128", "simd128">;
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//===----------------------------------------------------------------------===//
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// WebAssembly-specific DAG Node Types.
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// WebAssembly-specific DAG Nodes.
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// WebAssembly-specific Operands.
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// WebAssembly Instruction Format Definitions.
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//===----------------------------------------------------------------------===//
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include "WebAssemblyInstrFormats.td"
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//===----------------------------------------------------------------------===//
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// Additional sets of instructions.
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//===----------------------------------------------------------------------===//
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include "WebAssemblyInstrAtomics.td"
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include "WebAssemblyInstrSIMD.td"
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