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	ensure %o7 is not assigned as the destination of getpcx instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123304 91177308-0d34-0410-b5e6-96231b3b80d8
		
			
				
	
	
		
			252 lines
		
	
	
		
			8.3 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
			
		
		
	
	
			252 lines
		
	
	
		
			8.3 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
| //===-- SparcAsmPrinter.cpp - Sparc LLVM assembly writer ------------------===//
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| //
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| //                     The LLVM Compiler Infrastructure
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| //
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| // This file is distributed under the University of Illinois Open Source
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| // License. See LICENSE.TXT for details.
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| //
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| //===----------------------------------------------------------------------===//
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| //
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| // This file contains a printer that converts from our internal representation
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| // of machine-dependent LLVM code to GAS-format SPARC assembly language.
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| //
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| //===----------------------------------------------------------------------===//
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| 
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| #define DEBUG_TYPE "asm-printer"
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| #include "Sparc.h"
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| #include "SparcInstrInfo.h"
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| #include "SparcTargetMachine.h"
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| #include "llvm/CodeGen/AsmPrinter.h"
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| #include "llvm/CodeGen/MachineInstr.h"
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| #include "llvm/MC/MCAsmInfo.h"
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| #include "llvm/MC/MCStreamer.h"
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| #include "llvm/MC/MCSymbol.h"
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| #include "llvm/Target/Mangler.h"
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| #include "llvm/Target/TargetRegistry.h"
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| #include "llvm/ADT/SmallString.h"
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| #include "llvm/ADT/StringExtras.h"
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| #include "llvm/Support/raw_ostream.h"
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| using namespace llvm;
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| 
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| namespace {
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|   class SparcAsmPrinter : public AsmPrinter {
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|   public:
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|     explicit SparcAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
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|       : AsmPrinter(TM, Streamer) {}
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| 
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|     virtual const char *getPassName() const {
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|       return "Sparc Assembly Printer";
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|     }
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| 
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|     void printOperand(const MachineInstr *MI, int opNum, raw_ostream &OS);
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|     void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &OS,
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|                          const char *Modifier = 0);
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|     void printCCOperand(const MachineInstr *MI, int opNum, raw_ostream &OS);
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| 
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|     virtual void EmitInstruction(const MachineInstr *MI) {
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|       SmallString<128> Str;
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|       raw_svector_ostream OS(Str);
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|       printInstruction(MI, OS);
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|       OutStreamer.EmitRawText(OS.str());
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|     }
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|     void printInstruction(const MachineInstr *MI, raw_ostream &OS);// autogen'd.
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|     static const char *getRegisterName(unsigned RegNo);
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| 
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|     bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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|                          unsigned AsmVariant, const char *ExtraCode,
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|                          raw_ostream &O);
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|     bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
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|                                unsigned AsmVariant, const char *ExtraCode,
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|                                raw_ostream &O);
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| 
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|     bool printGetPCX(const MachineInstr *MI, unsigned OpNo, raw_ostream &OS);
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|     
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|     virtual bool isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB)
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|                        const;
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|   };
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| } // end of anonymous namespace
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| 
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| #include "SparcGenAsmWriter.inc"
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| 
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| void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
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|                                    raw_ostream &O) {
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|   const MachineOperand &MO = MI->getOperand (opNum);
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|   bool CloseParen = false;
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|   if (MI->getOpcode() == SP::SETHIi && !MO.isReg() && !MO.isImm()) {
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|     O << "%hi(";
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|     CloseParen = true;
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|   } else if ((MI->getOpcode() == SP::ORri || MI->getOpcode() == SP::ADDri) &&
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|              !MO.isReg() && !MO.isImm()) {
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|     O << "%lo(";
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|     CloseParen = true;
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|   }
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|   switch (MO.getType()) {
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|   case MachineOperand::MO_Register:
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|     O << "%" << LowercaseString(getRegisterName(MO.getReg()));
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|     break;
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| 
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|   case MachineOperand::MO_Immediate:
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|     O << (int)MO.getImm();
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|     break;
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|   case MachineOperand::MO_MachineBasicBlock:
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|     O << *MO.getMBB()->getSymbol();
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|     return;
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|   case MachineOperand::MO_GlobalAddress:
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|     O << *Mang->getSymbol(MO.getGlobal());
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|     break;
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|   case MachineOperand::MO_ExternalSymbol:
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|     O << MO.getSymbolName();
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|     break;
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|   case MachineOperand::MO_ConstantPoolIndex:
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|     O << MAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << "_"
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|       << MO.getIndex();
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|     break;
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|   default:
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|     llvm_unreachable("<unknown operand type>");
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|   }
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|   if (CloseParen) O << ")";
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| }
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| 
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| void SparcAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum,
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|                                       raw_ostream &O, const char *Modifier) {
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|   printOperand(MI, opNum, O);
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| 
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|   // If this is an ADD operand, emit it like normal operands.
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|   if (Modifier && !strcmp(Modifier, "arith")) {
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|     O << ", ";
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|     printOperand(MI, opNum+1, O);
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|     return;
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|   }
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| 
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|   if (MI->getOperand(opNum+1).isReg() &&
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|       MI->getOperand(opNum+1).getReg() == SP::G0)
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|     return;   // don't print "+%g0"
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|   if (MI->getOperand(opNum+1).isImm() &&
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|       MI->getOperand(opNum+1).getImm() == 0)
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|     return;   // don't print "+0"
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| 
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|   O << "+";
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|   if (MI->getOperand(opNum+1).isGlobal() ||
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|       MI->getOperand(opNum+1).isCPI()) {
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|     O << "%lo(";
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|     printOperand(MI, opNum+1, O);
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|     O << ")";
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|   } else {
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|     printOperand(MI, opNum+1, O);
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|   }
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| }
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| 
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| bool SparcAsmPrinter::printGetPCX(const MachineInstr *MI, unsigned opNum,
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|                                   raw_ostream &O) {
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|   std::string operand = "";
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|   const MachineOperand &MO = MI->getOperand(opNum);
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|   switch (MO.getType()) {
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|   default: assert(0 && "Operand is not a register ");
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|   case MachineOperand::MO_Register:
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|     assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
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|            "Operand is not a physical register ");
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|     assert(MO.getReg() != SP::O7 && 
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|            "%o7 is assigned as destination for getpcx!");
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|     operand = "%" + LowercaseString(getRegisterName(MO.getReg()));
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|     break;
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|   }
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| 
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|   unsigned mfNum = MI->getParent()->getParent()->getFunctionNumber();
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|   unsigned bbNum = MI->getParent()->getNumber();
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| 
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|   O << '\n' << ".LLGETPCH" << mfNum << '_' << bbNum << ":\n";
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|   O << "\tcall\t.LLGETPC" << mfNum << '_' << bbNum << '\n' ;
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| 
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|   O << "\t  sethi\t"
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|     << "%hi(_GLOBAL_OFFSET_TABLE_+(.-.LLGETPCH" << mfNum << '_' << bbNum 
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|     << ")), "  << operand << '\n' ;
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| 
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|   O << ".LLGETPC" << mfNum << '_' << bbNum << ":\n" ;
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|   O << "\tor\t" << operand  
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|     << ", %lo(_GLOBAL_OFFSET_TABLE_+(.-.LLGETPCH" << mfNum << '_' << bbNum
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|     << ")), " << operand << '\n';
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|   O << "\tadd\t" << operand << ", %o7, " << operand << '\n'; 
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|   
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|   return true;
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| }
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| 
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| void SparcAsmPrinter::printCCOperand(const MachineInstr *MI, int opNum,
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|                                      raw_ostream &O) {
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|   int CC = (int)MI->getOperand(opNum).getImm();
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|   O << SPARCCondCodeToString((SPCC::CondCodes)CC);
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| }
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| 
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| /// PrintAsmOperand - Print out an operand for an inline asm expression.
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| ///
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| bool SparcAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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|                                       unsigned AsmVariant,
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|                                       const char *ExtraCode,
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|                                       raw_ostream &O) {
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|   if (ExtraCode && ExtraCode[0]) {
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|     if (ExtraCode[1] != 0) return true; // Unknown modifier.
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| 
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|     switch (ExtraCode[0]) {
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|     default: return true;  // Unknown modifier.
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|     case 'r':
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|      break;
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|     }
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|   }
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| 
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|   printOperand(MI, OpNo, O);
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| 
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|   return false;
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| }
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| 
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| bool SparcAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
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|                                             unsigned OpNo, unsigned AsmVariant,
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|                                             const char *ExtraCode,
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|                                             raw_ostream &O) {
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|   if (ExtraCode && ExtraCode[0])
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|     return true;  // Unknown modifier
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| 
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|   O << '[';
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|   printMemOperand(MI, OpNo, O);
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|   O << ']';
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| 
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|   return false;
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| }
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| 
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| /// isBlockOnlyReachableByFallthough - Return true if the basic block has
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| /// exactly one predecessor and the control transfer mechanism between
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| /// the predecessor and this block is a fall-through.
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| ///
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| /// This overrides AsmPrinter's implementation to handle delay slots.
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| bool SparcAsmPrinter::
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| isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const {
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|   // If this is a landing pad, it isn't a fall through.  If it has no preds,
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|   // then nothing falls through to it.
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|   if (MBB->isLandingPad() || MBB->pred_empty())
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|     return false;
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|   
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|   // If there isn't exactly one predecessor, it can't be a fall through.
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|   MachineBasicBlock::const_pred_iterator PI = MBB->pred_begin(), PI2 = PI;
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|   ++PI2;
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|   if (PI2 != MBB->pred_end())
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|     return false;
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|   
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|   // The predecessor has to be immediately before this block.
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|   const MachineBasicBlock *Pred = *PI;
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|   
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|   if (!Pred->isLayoutSuccessor(MBB))
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|     return false;
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|   
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|   // Check if the last terminator is an unconditional branch.
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|   MachineBasicBlock::const_iterator I = Pred->end();
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|   while (I != Pred->begin() && !(--I)->getDesc().isTerminator())
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|     ; // Noop
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|   return I == Pred->end() || !I->getDesc().isBarrier();
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| }
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| 
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| 
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| 
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| // Force static initialization.
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| extern "C" void LLVMInitializeSparcAsmPrinter() { 
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|   RegisterAsmPrinter<SparcAsmPrinter> X(TheSparcTarget);
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|   RegisterAsmPrinter<SparcAsmPrinter> Y(TheSparcV9Target);
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| }
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