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			387 lines
		
	
	
		
			14 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
			
		
		
	
	
			387 lines
		
	
	
		
			14 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
//=====- SystemZFrameLowering.cpp - SystemZ Frame Information ------*- C++ -*-====//
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//
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//                     The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the SystemZ implementation of TargetFrameLowering class.
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//
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//===----------------------------------------------------------------------===//
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#include "SystemZFrameLowering.h"
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#include "SystemZInstrBuilder.h"
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#include "SystemZInstrInfo.h"
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#include "SystemZMachineFunctionInfo.h"
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#include "llvm/Function.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Support/CommandLine.h"
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using namespace llvm;
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SystemZFrameLowering::SystemZFrameLowering(const SystemZSubtarget &sti)
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  : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 8, -160), STI(sti) {
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  // Fill the spill offsets map
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  static const unsigned SpillOffsTab[][2] = {
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    { SystemZ::R2D,  0x10 },
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    { SystemZ::R3D,  0x18 },
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    { SystemZ::R4D,  0x20 },
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    { SystemZ::R5D,  0x28 },
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    { SystemZ::R6D,  0x30 },
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    { SystemZ::R7D,  0x38 },
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    { SystemZ::R8D,  0x40 },
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    { SystemZ::R9D,  0x48 },
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    { SystemZ::R10D, 0x50 },
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    { SystemZ::R11D, 0x58 },
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    { SystemZ::R12D, 0x60 },
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    { SystemZ::R13D, 0x68 },
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    { SystemZ::R14D, 0x70 },
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    { SystemZ::R15D, 0x78 }
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  };
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  RegSpillOffsets.grow(SystemZ::NUM_TARGET_REGS);
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  for (unsigned i = 0, e = array_lengthof(SpillOffsTab); i != e; ++i)
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    RegSpillOffsets[SpillOffsTab[i][0]] = SpillOffsTab[i][1];
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}
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/// needsFP - Return true if the specified function should have a dedicated
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/// frame pointer register.  This is true if the function has variable sized
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/// allocas or if frame pointer elimination is disabled.
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bool SystemZFrameLowering::hasFP(const MachineFunction &MF) const {
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  const MachineFrameInfo *MFI = MF.getFrameInfo();
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  return DisableFramePointerElim(MF) || MFI->hasVarSizedObjects();
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}
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/// emitSPUpdate - Emit a series of instructions to increment / decrement the
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/// stack pointer by a constant value.
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static
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void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
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                  int64_t NumBytes, const TargetInstrInfo &TII) {
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  unsigned Opc; uint64_t Chunk;
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  bool isSub = NumBytes < 0;
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  uint64_t Offset = isSub ? -NumBytes : NumBytes;
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  if (Offset >= (1LL << 15) - 1) {
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    Opc = SystemZ::ADD64ri32;
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    Chunk = (1LL << 31) - 1;
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  } else {
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    Opc = SystemZ::ADD64ri16;
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    Chunk = (1LL << 15) - 1;
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  }
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  DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
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  while (Offset) {
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    uint64_t ThisVal = (Offset > Chunk) ? Chunk : Offset;
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    MachineInstr *MI =
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      BuildMI(MBB, MBBI, DL, TII.get(Opc), SystemZ::R15D)
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      .addReg(SystemZ::R15D).addImm(isSub ? -ThisVal : ThisVal);
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    // The PSW implicit def is dead.
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    MI->getOperand(3).setIsDead();
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    Offset -= ThisVal;
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  }
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}
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void SystemZFrameLowering::emitPrologue(MachineFunction &MF) const {
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  MachineBasicBlock &MBB = MF.front();   // Prolog goes in entry BB
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  MachineFrameInfo *MFI = MF.getFrameInfo();
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  const SystemZInstrInfo &TII =
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    *static_cast<const SystemZInstrInfo*>(MF.getTarget().getInstrInfo());
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  SystemZMachineFunctionInfo *SystemZMFI =
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    MF.getInfo<SystemZMachineFunctionInfo>();
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  MachineBasicBlock::iterator MBBI = MBB.begin();
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  DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
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  // Get the number of bytes to allocate from the FrameInfo.
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  // Note that area for callee-saved stuff is already allocated, thus we need to
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  // 'undo' the stack movement.
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  uint64_t StackSize = MFI->getStackSize();
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  StackSize -= SystemZMFI->getCalleeSavedFrameSize();
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  uint64_t NumBytes = StackSize - getOffsetOfLocalArea();
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  // Skip the callee-saved push instructions.
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  while (MBBI != MBB.end() &&
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         (MBBI->getOpcode() == SystemZ::MOV64mr ||
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          MBBI->getOpcode() == SystemZ::MOV64mrm))
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    ++MBBI;
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  if (MBBI != MBB.end())
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    DL = MBBI->getDebugLoc();
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  // adjust stack pointer: R15 -= numbytes
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  if (StackSize || MFI->hasCalls()) {
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    assert(MF.getRegInfo().isPhysRegUsed(SystemZ::R15D) &&
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           "Invalid stack frame calculation!");
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    emitSPUpdate(MBB, MBBI, -(int64_t)NumBytes, TII);
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  }
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  if (hasFP(MF)) {
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    // Update R11 with the new base value...
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    BuildMI(MBB, MBBI, DL, TII.get(SystemZ::MOV64rr), SystemZ::R11D)
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      .addReg(SystemZ::R15D);
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    // Mark the FramePtr as live-in in every block except the entry.
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    for (MachineFunction::iterator I = llvm::next(MF.begin()), E = MF.end();
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         I != E; ++I)
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      I->addLiveIn(SystemZ::R11D);
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  }
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}
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void SystemZFrameLowering::emitEpilogue(MachineFunction &MF,
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                                    MachineBasicBlock &MBB) const {
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  const MachineFrameInfo *MFI = MF.getFrameInfo();
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  MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
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  const SystemZInstrInfo &TII =
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    *static_cast<const SystemZInstrInfo*>(MF.getTarget().getInstrInfo());
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  SystemZMachineFunctionInfo *SystemZMFI =
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    MF.getInfo<SystemZMachineFunctionInfo>();
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  unsigned RetOpcode = MBBI->getOpcode();
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  switch (RetOpcode) {
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  case SystemZ::RET: break;  // These are ok
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  default:
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    assert(0 && "Can only insert epilog into returning blocks");
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  }
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  // Get the number of bytes to allocate from the FrameInfo
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  // Note that area for callee-saved stuff is already allocated, thus we need to
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  // 'undo' the stack movement.
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  uint64_t StackSize =
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    MFI->getStackSize() - SystemZMFI->getCalleeSavedFrameSize();
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  uint64_t NumBytes = StackSize - getOffsetOfLocalArea();
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  // Skip the final terminator instruction.
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  while (MBBI != MBB.begin()) {
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    MachineBasicBlock::iterator PI = prior(MBBI);
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    --MBBI;
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    if (!PI->getDesc().isTerminator())
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      break;
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  }
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  // During callee-saved restores emission stack frame was not yet finialized
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  // (and thus - the stack size was unknown). Tune the offset having full stack
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  // size in hands.
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  if (StackSize || MFI->hasCalls()) {
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    assert((MBBI->getOpcode() == SystemZ::MOV64rmm ||
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            MBBI->getOpcode() == SystemZ::MOV64rm) &&
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           "Expected to see callee-save register restore code");
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    assert(MF.getRegInfo().isPhysRegUsed(SystemZ::R15D) &&
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           "Invalid stack frame calculation!");
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    unsigned i = 0;
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    MachineInstr &MI = *MBBI;
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    while (!MI.getOperand(i).isImm()) {
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      ++i;
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      assert(i < MI.getNumOperands() && "Unexpected restore code!");
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    }
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    uint64_t Offset = NumBytes + MI.getOperand(i).getImm();
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    // If Offset does not fit into 20-bit signed displacement field we need to
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    // emit some additional code...
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    if (Offset > 524287) {
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      // Fold the displacement into load instruction as much as possible.
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      NumBytes = Offset - 524287;
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      Offset = 524287;
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      emitSPUpdate(MBB, MBBI, NumBytes, TII);
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    }
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    MI.getOperand(i).ChangeToImmediate(Offset);
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  }
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}
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int SystemZFrameLowering::getFrameIndexOffset(const MachineFunction &MF,
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                                          int FI) const {
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  const MachineFrameInfo *MFI = MF.getFrameInfo();
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  const SystemZMachineFunctionInfo *SystemZMFI =
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    MF.getInfo<SystemZMachineFunctionInfo>();
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  int Offset = MFI->getObjectOffset(FI) + MFI->getOffsetAdjustment();
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  uint64_t StackSize = MFI->getStackSize();
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  // Fixed objects are really located in the "previous" frame.
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  if (FI < 0)
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    StackSize -= SystemZMFI->getCalleeSavedFrameSize();
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  Offset += StackSize - getOffsetOfLocalArea();
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  // Skip the register save area if we generated the stack frame.
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  if (StackSize || MFI->hasCalls())
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    Offset -= getOffsetOfLocalArea();
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  return Offset;
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}
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bool
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SystemZFrameLowering::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
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                                            MachineBasicBlock::iterator MI,
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                                        const std::vector<CalleeSavedInfo> &CSI,
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                                          const TargetRegisterInfo *TRI) const {
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  if (CSI.empty())
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    return false;
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  DebugLoc DL;
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  if (MI != MBB.end()) DL = MI->getDebugLoc();
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  MachineFunction &MF = *MBB.getParent();
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  const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
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  SystemZMachineFunctionInfo *MFI = MF.getInfo<SystemZMachineFunctionInfo>();
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  unsigned CalleeFrameSize = 0;
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  // Scan the callee-saved and find the bounds of register spill area.
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  unsigned LowReg = 0, HighReg = 0, StartOffset = -1U, EndOffset = 0;
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  for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
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    unsigned Reg = CSI[i].getReg();
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    if (!SystemZ::FP64RegClass.contains(Reg)) {
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      unsigned Offset = RegSpillOffsets[Reg];
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      CalleeFrameSize += 8;
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      if (StartOffset > Offset) {
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        LowReg = Reg; StartOffset = Offset;
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      }
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      if (EndOffset < Offset) {
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        HighReg = Reg; EndOffset = RegSpillOffsets[Reg];
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      }
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    }
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  }
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  // Save information for epilogue inserter.
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  MFI->setCalleeSavedFrameSize(CalleeFrameSize);
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  MFI->setLowReg(LowReg); MFI->setHighReg(HighReg);
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  // Save GPRs
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  if (StartOffset) {
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    // Build a store instruction. Use STORE MULTIPLE instruction if there are many
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    // registers to store, otherwise - just STORE.
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    MachineInstrBuilder MIB =
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      BuildMI(MBB, MI, DL, TII.get((LowReg == HighReg ?
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                                    SystemZ::MOV64mr : SystemZ::MOV64mrm)));
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    // Add store operands.
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    MIB.addReg(SystemZ::R15D).addImm(StartOffset);
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    if (LowReg == HighReg)
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      MIB.addReg(0);
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    MIB.addReg(LowReg, RegState::Kill);
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    if (LowReg != HighReg)
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      MIB.addReg(HighReg, RegState::Kill);
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    // Do a second scan adding regs as being killed by instruction
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    for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
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      unsigned Reg = CSI[i].getReg();
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      // Add the callee-saved register as live-in. It's killed at the spill.
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      MBB.addLiveIn(Reg);
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      if (Reg != LowReg && Reg != HighReg)
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        MIB.addReg(Reg, RegState::ImplicitKill);
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    }
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  }
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  // Save FPRs
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  for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
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    unsigned Reg = CSI[i].getReg();
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    if (SystemZ::FP64RegClass.contains(Reg)) {
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      MBB.addLiveIn(Reg);
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      TII.storeRegToStackSlot(MBB, MI, Reg, true, CSI[i].getFrameIdx(),
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                              &SystemZ::FP64RegClass, TRI);
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    }
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  }
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  return true;
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}
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bool
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SystemZFrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
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                                              MachineBasicBlock::iterator MI,
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                                        const std::vector<CalleeSavedInfo> &CSI,
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                                          const TargetRegisterInfo *TRI) const {
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  if (CSI.empty())
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    return false;
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  DebugLoc DL;
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  if (MI != MBB.end()) DL = MI->getDebugLoc();
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  MachineFunction &MF = *MBB.getParent();
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  const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
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  SystemZMachineFunctionInfo *MFI = MF.getInfo<SystemZMachineFunctionInfo>();
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  // Restore FP registers
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  for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
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    unsigned Reg = CSI[i].getReg();
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    if (SystemZ::FP64RegClass.contains(Reg))
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      TII.loadRegFromStackSlot(MBB, MI, Reg, CSI[i].getFrameIdx(),
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                               &SystemZ::FP64RegClass, TRI);
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  }
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  // Restore GP registers
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  unsigned LowReg = MFI->getLowReg(), HighReg = MFI->getHighReg();
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  unsigned StartOffset = RegSpillOffsets[LowReg];
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  if (StartOffset) {
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    // Build a load instruction. Use LOAD MULTIPLE instruction if there are many
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    // registers to load, otherwise - just LOAD.
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    MachineInstrBuilder MIB =
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      BuildMI(MBB, MI, DL, TII.get((LowReg == HighReg ?
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                                    SystemZ::MOV64rm : SystemZ::MOV64rmm)));
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    // Add store operands.
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    MIB.addReg(LowReg, RegState::Define);
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    if (LowReg != HighReg)
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      MIB.addReg(HighReg, RegState::Define);
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    MIB.addReg(hasFP(MF) ? SystemZ::R11D : SystemZ::R15D);
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    MIB.addImm(StartOffset);
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    if (LowReg == HighReg)
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      MIB.addReg(0);
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    // Do a second scan adding regs as being defined by instruction
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    for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
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      unsigned Reg = CSI[i].getReg();
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      if (Reg != LowReg && Reg != HighReg)
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        MIB.addReg(Reg, RegState::ImplicitDefine);
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    }
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  }
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  return true;
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}
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void
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SystemZFrameLowering::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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                                                       RegScavenger *RS) const {
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  // Determine whether R15/R14 will ever be clobbered inside the function. And
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  // if yes - mark it as 'callee' saved.
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  MachineFrameInfo *FFI = MF.getFrameInfo();
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  MachineRegisterInfo &MRI = MF.getRegInfo();
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  // Check whether high FPRs are ever used, if yes - we need to save R15 as
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  // well.
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  static const unsigned HighFPRs[] = {
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    SystemZ::F8L,  SystemZ::F9L,  SystemZ::F10L, SystemZ::F11L,
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    SystemZ::F12L, SystemZ::F13L, SystemZ::F14L, SystemZ::F15L,
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    SystemZ::F8S,  SystemZ::F9S,  SystemZ::F10S, SystemZ::F11S,
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    SystemZ::F12S, SystemZ::F13S, SystemZ::F14S, SystemZ::F15S,
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  };
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  bool HighFPRsUsed = false;
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  for (unsigned i = 0, e = array_lengthof(HighFPRs); i != e; ++i)
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    HighFPRsUsed |= MRI.isPhysRegUsed(HighFPRs[i]);
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  if (FFI->hasCalls())
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    /* FIXME: function is varargs */
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    /* FIXME: function grabs RA */
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    /* FIXME: function calls eh_return */
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    MRI.setPhysRegUsed(SystemZ::R14D);
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  if (HighFPRsUsed ||
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      FFI->hasCalls() ||
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      FFI->getObjectIndexEnd() != 0 || // Contains automatic variables
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      FFI->hasVarSizedObjects() // Function calls dynamic alloca's
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      /* FIXME: function is varargs */)
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    MRI.setPhysRegUsed(SystemZ::R15D);
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}
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