llvm-6502/test/MC/Disassembler
Joey Gouly d1311ac171 [ARM] Introduce the 'sevl' instruction in ARMv8.
This also removes the restriction on the immediate field of the 'hint'
instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191744 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-01 12:39:11 +00:00
..
AArch64 AArch64: use RegisterOperand for NEON registers. 2013-09-13 07:26:52 +00:00
ARM [ARM] Introduce the 'sevl' instruction in ARMv8. 2013-10-01 12:39:11 +00:00
Mips Fixed bug when generating Load Upper Immediate microMIPS instruction. 2013-09-14 07:35:41 +00:00
SystemZ [SystemZ] Add truncating high-word stores (STCH and STHH) 2013-10-01 12:22:49 +00:00
X86 Add a few more FMA4 disassembler test cases to match the scalar set with regards to combinations of L and W-bits. 2013-09-30 02:50:51 +00:00
XCore [tests] Cleanup initialization of test suffixes. 2013-08-16 00:37:11 +00:00