Robert Khasanov d25d7bb372 [AVX512] Enable FP arithmetic lowering for AVX512VL subsets. ...

Added RegOp2MemOpTable4 to transform 4th operand from register to memory in merge-masked versions of instructions. 
Added lowering tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224516 91177308-0d34-0410-b5e6-96231b3b80d8

2014-12-18 12:28:22 +00:00

..

AArch64

IR: Make metadata typeless in assembly

2014-12-15 19:07:53 +00:00

ARM

Add a new string member to the TargetOptions struct for the name

2014-12-18 02:20:58 +00:00

CPP

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Generic

IR: Make metadata typeless in assembly

2014-12-15 19:07:53 +00:00

Hexagon

IR: Make metadata typeless in assembly

2014-12-15 19:07:53 +00:00

Inputs

IR: Make metadata typeless in assembly

2014-12-15 19:07:53 +00:00

Mips

[mips] Set GCC-compatible MIPS asssembler options before inline asm blocks.

2014-12-17 10:56:16 +00:00

MSP430

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NVPTX

[NVPTX] Fix bugs related to isSingleValueType

2014-12-17 17:59:04 +00:00

PowerPC

[PowerPC] Improve instruction selection bit-permuting operations (32-bit)

2014-12-16 05:51:41 +00:00

R600

R600/SI: Fix f64 inline immediates

2014-12-17 21:04:08 +00:00

SPARC

IR: Make metadata typeless in assembly

2014-12-15 19:07:53 +00:00

SystemZ

IR: Make metadata typeless in assembly

2014-12-15 19:07:53 +00:00

Thumb

IR: Make metadata typeless in assembly

2014-12-15 19:07:53 +00:00

Thumb2

IR: Make metadata typeless in assembly

2014-12-15 19:07:53 +00:00

X86

[AVX512] Enable FP arithmetic lowering for AVX512VL subsets.

2014-12-18 12:28:22 +00:00

XCore

IR: Make metadata typeless in assembly

2014-12-15 19:07:53 +00:00