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https://github.com/c64scene-ar/llvm-6502.git
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a new set of them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94631 91177308-0d34-0410-b5e6-96231b3b80d8
254 lines
7.7 KiB
C++
254 lines
7.7 KiB
C++
//===-- SparcAsmPrinter.cpp - Sparc LLVM assembly writer ------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to GAS-format SPARC assembly language.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "asm-printer"
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#include "Sparc.h"
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#include "SparcInstrInfo.h"
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#include "SparcTargetMachine.h"
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#include "llvm/Constants.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Module.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/CodeGen/DwarfWriter.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/Target/TargetLoweringObjectFile.h"
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#include "llvm/Target/TargetRegistry.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/FormattedStream.h"
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#include "llvm/Support/MathExtras.h"
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#include <cctype>
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#include <cstring>
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#include <map>
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using namespace llvm;
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STATISTIC(EmittedInsts, "Number of machine instrs printed");
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namespace {
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class SparcAsmPrinter : public AsmPrinter {
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public:
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explicit SparcAsmPrinter(formatted_raw_ostream &O, TargetMachine &TM,
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const MCAsmInfo *T, bool V)
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: AsmPrinter(O, TM, T, V) {}
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virtual const char *getPassName() const {
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return "Sparc Assembly Printer";
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}
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void printOperand(const MachineInstr *MI, int opNum);
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void printMemOperand(const MachineInstr *MI, int opNum,
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const char *Modifier = 0);
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void printCCOperand(const MachineInstr *MI, int opNum);
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void printInstruction(const MachineInstr *MI); // autogenerated.
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static const char *getRegisterName(unsigned RegNo);
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bool runOnMachineFunction(MachineFunction &F);
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bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant, const char *ExtraCode);
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bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant, const char *ExtraCode);
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bool printGetPCX(const MachineInstr *MI, unsigned OpNo);
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};
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} // end of anonymous namespace
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#include "SparcGenAsmWriter.inc"
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/// runOnMachineFunction - This uses the printInstruction()
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/// method to print assembly for each instruction.
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///
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bool SparcAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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SetupMachineFunction(MF);
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EmitFunctionHeader();
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// Print out code for the function.
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for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
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I != E; ++I) {
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// Print a label for the basic block.
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if (I != MF.begin())
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EmitBasicBlockStart(I);
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for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
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II != E; ++II) {
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// Print the assembly for the instruction.
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processDebugLoc(II, true);
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printInstruction(II);
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if (VerboseAsm)
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EmitComments(*II);
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O << '\n';
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processDebugLoc(II, false);
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++EmittedInsts;
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}
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}
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// Emit post-function debug information.
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DW->EndFunction(&MF);
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// We didn't modify anything.
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O << "\t.size\t" << *CurrentFnSym << ", .-" << *CurrentFnSym << '\n';
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return false;
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}
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void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
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const MachineOperand &MO = MI->getOperand (opNum);
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bool CloseParen = false;
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if (MI->getOpcode() == SP::SETHIi && !MO.isReg() && !MO.isImm()) {
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O << "%hi(";
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CloseParen = true;
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} else if ((MI->getOpcode() == SP::ORri || MI->getOpcode() == SP::ADDri) &&
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!MO.isReg() && !MO.isImm()) {
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O << "%lo(";
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CloseParen = true;
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}
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switch (MO.getType()) {
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case MachineOperand::MO_Register:
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O << "%" << LowercaseString(getRegisterName(MO.getReg()));
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break;
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case MachineOperand::MO_Immediate:
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O << (int)MO.getImm();
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break;
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case MachineOperand::MO_MachineBasicBlock:
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O << *MO.getMBB()->getSymbol(OutContext);
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return;
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case MachineOperand::MO_GlobalAddress:
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O << *GetGlobalValueSymbol(MO.getGlobal());
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break;
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case MachineOperand::MO_ExternalSymbol:
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O << MO.getSymbolName();
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break;
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case MachineOperand::MO_ConstantPoolIndex:
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O << MAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << "_"
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<< MO.getIndex();
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break;
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default:
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llvm_unreachable("<unknown operand type>");
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}
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if (CloseParen) O << ")";
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}
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void SparcAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum,
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const char *Modifier) {
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printOperand(MI, opNum);
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// If this is an ADD operand, emit it like normal operands.
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if (Modifier && !strcmp(Modifier, "arith")) {
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O << ", ";
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printOperand(MI, opNum+1);
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return;
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}
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if (MI->getOperand(opNum+1).isReg() &&
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MI->getOperand(opNum+1).getReg() == SP::G0)
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return; // don't print "+%g0"
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if (MI->getOperand(opNum+1).isImm() &&
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MI->getOperand(opNum+1).getImm() == 0)
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return; // don't print "+0"
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O << "+";
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if (MI->getOperand(opNum+1).isGlobal() ||
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MI->getOperand(opNum+1).isCPI()) {
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O << "%lo(";
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printOperand(MI, opNum+1);
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O << ")";
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} else {
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printOperand(MI, opNum+1);
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}
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}
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bool SparcAsmPrinter::printGetPCX(const MachineInstr *MI, unsigned opNum) {
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std::string operand = "";
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const MachineOperand &MO = MI->getOperand(opNum);
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switch (MO.getType()) {
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default: assert(0 && "Operand is not a register ");
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case MachineOperand::MO_Register:
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assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
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"Operand is not a physical register ");
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operand = "%" + LowercaseString(getRegisterName(MO.getReg()));
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break;
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}
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unsigned bbNum = MI->getParent()->getNumber();
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O << '\n' << ".LLGETPCH" << bbNum << ":\n";
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O << "\tcall\t.LLGETPC" << bbNum << '\n' ;
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O << "\t sethi\t"
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<< "%hi(_GLOBAL_OFFSET_TABLE_+(.-.LLGETPCH" << bbNum << ")), "
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<< operand << '\n' ;
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O << ".LLGETPC" << bbNum << ":\n" ;
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O << "\tor\t" << operand
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<< ", %lo(_GLOBAL_OFFSET_TABLE_+(.-.LLGETPCH" << bbNum << ")), "
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<< operand << '\n';
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O << "\tadd\t" << operand << ", %o7, " << operand << '\n';
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return true;
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}
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void SparcAsmPrinter::printCCOperand(const MachineInstr *MI, int opNum) {
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int CC = (int)MI->getOperand(opNum).getImm();
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O << SPARCCondCodeToString((SPCC::CondCodes)CC);
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}
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/// PrintAsmOperand - Print out an operand for an inline asm expression.
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///
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bool SparcAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant,
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const char *ExtraCode) {
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if (ExtraCode && ExtraCode[0]) {
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if (ExtraCode[1] != 0) return true; // Unknown modifier.
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switch (ExtraCode[0]) {
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default: return true; // Unknown modifier.
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case 'r':
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break;
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}
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}
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printOperand(MI, OpNo);
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return false;
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}
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bool SparcAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
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unsigned OpNo,
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unsigned AsmVariant,
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const char *ExtraCode) {
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if (ExtraCode && ExtraCode[0])
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return true; // Unknown modifier
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O << '[';
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printMemOperand(MI, OpNo);
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O << ']';
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return false;
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}
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// Force static initialization.
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extern "C" void LLVMInitializeSparcAsmPrinter() {
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RegisterAsmPrinter<SparcAsmPrinter> X(TheSparcTarget);
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}
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