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https://github.com/c64scene-ar/llvm-6502.git
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6fc40079f3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31450 91177308-0d34-0410-b5e6-96231b3b80d8
65 lines
2.0 KiB
C++
65 lines
2.0 KiB
C++
//===-- PPC.h - Top-level interface for PowerPC Target ----------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the entry points for global functions defined in the LLVM
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// PowerPC back-end.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TARGET_POWERPC_H
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#define LLVM_TARGET_POWERPC_H
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#include <iosfwd>
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// GCC #defines PPC on Linux but we use it as our namespace name
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#undef PPC
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namespace llvm {
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class PPCTargetMachine;
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class FunctionPassManager;
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class FunctionPass;
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class MachineCodeEmitter;
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namespace PPC {
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/// Predicate - These are "(BI << 5) | BO" for various predicates.
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enum Predicate {
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PRED_ALWAYS = (0 << 5) | 20,
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PRED_LT = (0 << 5) | 12,
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PRED_LE = (1 << 5) | 4,
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PRED_EQ = (2 << 5) | 12,
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PRED_GE = (0 << 5) | 4,
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PRED_GT = (1 << 5) | 12,
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PRED_NE = (2 << 5) | 4,
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PRED_UN = (3 << 5) | 12,
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PRED_NU = (3 << 5) | 4
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};
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}
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FunctionPass *createPPCBranchSelectionPass();
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FunctionPass *createPPCISelDag(PPCTargetMachine &TM);
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FunctionPass *createPPCAsmPrinterPass(std::ostream &OS,
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PPCTargetMachine &TM);
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FunctionPass *createPPCCodeEmitterPass(PPCTargetMachine &TM,
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MachineCodeEmitter &MCE);
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void addPPCMachOObjectWriterPass(FunctionPassManager &FPM, std::ostream &o,
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PPCTargetMachine &tm);
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} // end namespace llvm;
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// Defines symbolic names for PowerPC registers. This defines a mapping from
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// register name to register number.
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//
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#include "PPCGenRegisterNames.inc"
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// Defines symbolic names for the PowerPC instructions.
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//
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#include "PPCGenInstrNames.inc"
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#endif
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