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d55e1ca5ef96821d8c96da6f0d79e3f96d810cdd
llvm-6502/lib/CodeGen/SelectionDAG
History
Evan Cheng 7df96d6672 X86 lowers SELECT to a cmp / test followed by a conditional move.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24754 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 01:21:05 +00:00
..
DAGCombiner.cpp
Don't create SEXTLOAD/ZEXTLOAD instructions that the target doesn't support
2005-12-15 19:02:38 +00:00
LegalizeDAG.cpp
X86 lowers SELECT to a cmp / test followed by a conditional move.
2005-12-17 01:21:05 +00:00
Makefile
Change Library Names Not To Conflict With Others When Installed
2004-10-27 23:18:45 +00:00
ScheduleDAG.cpp
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
2005-12-01 04:51:06 +00:00
SelectionDAG.cpp
Added source file/line correspondence for dwarf (PowerPC only at this point.)
2005-12-16 22:45:29 +00:00
SelectionDAGISel.cpp
Added source file/line correspondence for dwarf (PowerPC only at this point.)
2005-12-16 22:45:29 +00:00
SelectionDAGPrinter.cpp
Added an index field to GlobalAddressSDNode so it can represent X+12, etc.
2005-11-30 02:04:11 +00:00
TargetLowering.cpp
Add the majority of the vector machien value types we expect to support,
2005-11-29 05:45:29 +00:00
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