mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-10-30 16:17:05 +00:00
a70f28ce7d
The MicroBlaze is a highly configurable 32-bit soft-microprocessor for use on Xilinx FPGAs. For more information see: http://www.xilinx.com/tools/microblaze.htm http://en.wikipedia.org/wiki/MicroBlaze The current LLVM MicroBlaze backend generates assembly which can be compiled using the an appropriate binutils assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96969 91177308-0d34-0410-b5e6-96231b3b80d8
52 lines
1.2 KiB
LLVM
52 lines
1.2 KiB
LLVM
; Ensure that multiplication is lowered to function calls when the multiplier
|
|
; unit is not available in the hardware and that function calls are not used
|
|
; when the multiplier unit is available in the hardware.
|
|
;
|
|
; RUN: llc < %s -march=mblaze | FileCheck -check-prefix=FUN %s
|
|
; RUN: llc < %s -march=mblaze -mattr=+mul | FileCheck -check-prefix=MUL %s
|
|
|
|
define i8 @test_i8(i8 %a, i8 %b) {
|
|
; FUN: test_i8:
|
|
; MUL: test_i8:
|
|
|
|
%tmp.1 = mul i8 %a, %b
|
|
; FUN-NOT: mul
|
|
; FUN: brlid
|
|
; MUL-NOT: brlid
|
|
; MUL: mul
|
|
|
|
ret i8 %tmp.1
|
|
; FUN: rtsd
|
|
; MUL: rtsd
|
|
}
|
|
|
|
define i16 @test_i16(i16 %a, i16 %b) {
|
|
; FUN: test_i16:
|
|
; MUL: test_i16:
|
|
|
|
%tmp.1 = mul i16 %a, %b
|
|
; FUN-NOT: mul
|
|
; FUN: brlid
|
|
; MUL-NOT: brlid
|
|
; MUL: mul
|
|
|
|
ret i16 %tmp.1
|
|
; FUN: rtsd
|
|
; MUL: rtsd
|
|
}
|
|
|
|
define i32 @test_i32(i32 %a, i32 %b) {
|
|
; FUN: test_i32:
|
|
; MUL: test_i32:
|
|
|
|
%tmp.1 = mul i32 %a, %b
|
|
; FUN-NOT: mul
|
|
; FUN: brlid
|
|
; MUL-NOT: brlid
|
|
; MUL: mul
|
|
|
|
ret i32 %tmp.1
|
|
; FUN: rtsd
|
|
; MUL: rtsd
|
|
}
|