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https://github.com/c64scene-ar/llvm-6502.git
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400f75cb5e
needs to demand the high bits because it's asserting that they're zero. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105406 91177308-0d34-0410-b5e6-96231b3b80d8
23 lines
693 B
LLVM
23 lines
693 B
LLVM
; RUN: llc < %s | FileCheck %s
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; rdar://8051990
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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target triple = "x86_64-apple-darwin11"
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; ISel doesn't yet know how to eliminate this extra zero-extend. But until
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; it knows how to do so safely, it shouldn;t eliminate it.
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; CHECK: movzbl (%rdi), %eax
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; CHECK: movzwl %ax, %eax
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define i64 @_ZL5matchPKtPKhiR9MatchData(i8* %tmp13) nounwind {
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entry:
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%tmp14 = load i8* %tmp13, align 1
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%tmp17 = zext i8 %tmp14 to i16
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br label %bb341
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bb341:
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%tmp18 = add i16 %tmp17, -1
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%tmp23 = sext i16 %tmp18 to i64
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ret i64 %tmp23
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}
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