Anton Korobeynikov 41a024385f Propagate CPU string out of SubtargetFeatures ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72335 91177308-0d34-0410-b5e6-96231b3b80d8

2009-05-23 19:50:50 +00:00

..

DarwinTargetAsmInfo.h

Tidy up #includes, deleting a bunch of unnecessary #includes.

2009-01-05 17:59:02 +00:00

ELFTargetAsmInfo.h

Do not propagate ELF-specific stuff (data.rel) into other targets. This simplifies code and also ensures correctness.

2009-03-30 15:27:43 +00:00

SubtargetFeature.h

Propagate CPU string out of SubtargetFeatures

2009-05-23 19:50:50 +00:00

Target.td

Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize

2009-04-13 21:06:25 +00:00

TargetAsmInfo.h

Add directive to declare external globals.

2009-04-29 08:23:18 +00:00

TargetCallingConv.td

Use CallConvLower.h and TableGen descriptions of the calling conventions

2009-04-17 19:07:39 +00:00

TargetData.h

Clarify a comment.

2009-05-12 17:08:34 +00:00

TargetELFWriterInfo.h

Tidy up #includes, deleting a bunch of unnecessary #includes.

2009-01-05 17:59:02 +00:00

TargetFrameInfo.h

Tidy up #includes, deleting a bunch of unnecessary #includes.

2009-01-05 17:59:02 +00:00

TargetInstrDesc.h

Add new TargetInstrDesc::hasImplicitUseOfPhysReg and

2009-04-12 07:26:51 +00:00

TargetInstrInfo.h

Move getInstrOperandRegClass from the scheduler to TargetInstrInfo.

2009-05-05 00:30:09 +00:00

TargetInstrItineraries.h

…

TargetIntrinsicInfo.h

Added support to have TableGen provide information if an intrinsic (core

2009-02-24 23:17:49 +00:00

TargetJITInfo.h

Fix doxygen comment syntax.

2009-04-15 01:44:07 +00:00

TargetLowering.h

Run code placement optimization for targets that want it (arm and x86 for now).

2009-05-13 21:42:09 +00:00

TargetMachine.h

Remove unused flags.

2009-04-30 00:57:51 +00:00

TargetMachineRegistry.h

Registry.h should not depend on CommandLine.h.

2009-01-16 07:02:28 +00:00

TargetMachOWriterInfo.h

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TargetOptions.h

Correct comment.

2009-04-29 00:09:22 +00:00

TargetRegisterInfo.h

In some rare cases, the register allocator can spill registers but end up not utilizing registers at all. The fundamental problem is linearscan's backtracking can end up freeing more than one allocated registers. However, reloads and restores might be folded into uses / defs and freed registers might not be used at all.

2009-05-03 18:32:42 +00:00

TargetSchedule.td

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TargetSelectionDAG.td

2nd attempt, fixing SSE4.1 issues and implementing feedback from duncan.

2009-04-27 18:41:29 +00:00

TargetSubtarget.h

Add initial support for back-scheduling address computations,

2008-12-16 03:35:01 +00:00